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path: root/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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* Generalize the specialized flag-carrying SDNodes by moving flags into SDNode.Amara Emerson2017-05-011-12/+11
* Make getParamAlignment use argument numbersReid Kleckner2017-04-281-2/+1
* [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem...Craig Topper2017-04-281-165/+142
* [SelectionDAG] Use various APInt methods to reduce temporary APInt creationCraig Topper2017-04-281-26/+17
* [APInt] Use inplace shift methods where possible. NFCICraig Topper2017-04-281-2/+2
* [TargetLowering] fix isConstTrueVal to account for build vector truncationSanjay Patel2017-04-261-13/+17
* [DAG] add FIXME comments for splat detection; NFCSanjay Patel2017-04-261-0/+3
* Move value type list from TargetRegisterClass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-3/+3
* Revert r301231: Accidentally committed stale filesKrzysztof Parzyszek2017-04-241-3/+3
* Move value type list from TargetRegisterClass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-3/+3
* Revert "[APInt] Fix a few places that use APInt::getRawData to operate within...Renato Golin2017-04-231-2/+2
* [APInt] Use operator<<= where possible. NFCCraig Topper2017-04-231-1/+1
* [APInt] Use ashInPlace where possible.Craig Topper2017-04-231-1/+1
* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-211-30/+36
* Revert r300932 and r300930.Akira Hatanaka2017-04-211-36/+30
* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-211-30/+36
* Revert "[AArch64] Improve code generation for logical instructions taking"Akira Hatanaka2017-04-201-36/+30
* [AArch64] Improve code generation for logical instructions takingAkira Hatanaka2017-04-201-30/+36
* [APInt] Rename getSignBit to getSignMaskCraig Topper2017-04-201-8/+8
* [SelectionDAG] Fix another place that was passing a large value to APInt::lsh...Craig Topper2017-04-201-15/+17
* [SelectionDAG] Use getActiveBits() and countTrailingZeros() to avoid creating...Craig Topper2017-04-201-4/+3
* Recommit "[APInt] Add back the asserts that check that the APInt shift method...Craig Topper2017-04-201-2/+3
* [DAG] add splat vector support for 'xor' in SimplifyDemandedBitsSanjay Patel2017-04-191-1/+1
* [DAG] add splat vector support for 'and' in SimplifyDemandedBitsSanjay Patel2017-04-191-1/+1
* [APInt] Use lshrInPlace to replace lshr where possibleCraig Topper2017-04-181-6/+7
* [IR] Make paramHasAttr to use arg indices instead of attr indicesReid Kleckner2017-04-141-12/+13
* [SelectionDAG] Use APInt move assignment to avoid 2 memory allocations and co...Craig Topper2017-04-121-2/+2
* [SelectionDAG] TargetLowering::SimplifyDemandedBits how to properly calculate...Craig Topper2017-04-101-1/+5
* Revert accidental commit of r299619.Craig Topper2017-04-061-15/+31
* Revert accidental commit of r299618Craig Topper2017-04-061-3/+0
* barCraig Topper2017-04-061-31/+15
* fooCraig Topper2017-04-061-0/+3
* [DAGCombiner] Add vector demanded elements support to ComputeNumSignBitsSimon Pilgrim2017-03-311-0/+1
* [DAGCombiner] Add vector demanded elements support to computeKnownBitsForTarg...Simon Pilgrim2017-03-311-0/+1
* Rename AttributeSet to AttributeListReid Kleckner2017-03-211-6/+7
* Make library calls sensitive to regparm module flag (Fixes PR3997).Nirav Dave2017-03-181-7/+10
* Capitalize ArgListEntry fields. NFC.Nirav Dave2017-03-181-12/+12
* [CodeGen] Use APInt::setLowBits/setHighBits/setBitsFrom in more placesCraig Topper2017-03-151-5/+4
* [ARM] Move SMULW[B|T] isel to DAG CombineSam Parker2017-03-141-0/+15
* Use APInt::getOneBitSet instead of APInt::getBitsSet for sign bit mask creationSimon Pilgrim2017-03-031-1/+1
* [TargetLowering] fix SETCC SETLT folding with FP typesSanjay Patel2017-02-121-9/+13
* [TargetLowering] check for sign-bit comparisons in SimplifyDemandedBitsSanjay Patel2017-02-111-0/+19
* [TargetLowering] fix formatting and comments for ShrinkDemandedConstant; NFCSanjay Patel2017-02-071-19/+20
* DAG: Fold fneg into compare with constant into the constantMatt Arsenault2017-01-301-0/+10
* Add iterator_range<regclass_iterator> to {Target,MC}RegisterInfo, NFCKrzysztof Parzyszek2017-01-251-4/+1
* DAG: Avoid OOB when legalizing vector indexingMatt Arsenault2017-01-101-1/+44
* [SelectionDAG] Use SelectionDAG.getBuildVector helper. NFCI.Simon Pilgrim2016-12-091-1/+1
* [SelectionDAG] Add expansion and promotion of [US]MUL_LOHINicolai Haehnle2016-12-081-21/+118
* [TargetLowering] add special-case for demanded bits analysis of 'not'Sanjay Patel2016-12-051-5/+19
* [SelectionDAG] Refactor TargetLowering::expandMUL (NFC)Nicolai Haehnle2016-11-301-50/+32
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