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path: root/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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* [TargetLowering] Begin generalizing TargetLowering::expandFP_TO_SINT support....Simon Pilgrim2018-11-051-26/+26
* [LegalizeDAG] Add generic vector CTPOP expansion (PR32655)Simon Pilgrim2018-11-011-2/+13
* Check shouldReduceLoadWidth from SimplifySetCCStanislav Mekhanoshin2018-10-311-1/+2
* [Intrinsic] Signed and Unsigned Saturation Subtraction IntirnsicsLeonard Chan2018-10-291-16/+36
* [TargetLowering] Move i64/vXi64 to f32/vXf32 UINT_TO_FP handling to TargetLow...Simon Pilgrim2018-10-281-29/+72
* [VectorLegalizer] Enable TargetLowering::expandFP_TO_UINT support.Simon Pilgrim2018-10-281-0/+5
* [TargetLowering] Move LegalizeDAG FP_TO_UINT handling to TargetLowering::expa...Simon Pilgrim2018-10-271-0/+31
* [TargetLowering] Improve vXi64 UINT_TO_FP vXf64 support (P38226)Simon Pilgrim2018-10-251-0/+42
* [TargetLowering] Add SimplifyDemandedBitsForTargetNode callbackSimon Pilgrim2018-10-241-0/+24
* [LegalizeDAG] Share Vector/Scalar CTPOP ExpansionSimon Pilgrim2018-10-231-0/+49
* [LegalizeDAG] Share Vector/Scalar CTLZ ExpansionSimon Pilgrim2018-10-231-0/+53
* [LegalizeDAG] Share Vector/Scalar CTTZ ExpansionSimon Pilgrim2018-10-231-0/+55
* [Intrinsic] Unigned Saturation Addition IntrinsicLeonard Chan2018-10-221-22/+27
* DAG: Change behavior of fminnum/fmaxnum nodesMatt Arsenault2018-10-221-0/+29
* [Intrinsic] Signed Saturation Addition IntrinsicLeonard Chan2018-10-161-0/+43
* [SelectionDAG] allow FP binops in SimplifyDemandedVectorEltsSanjay Patel2018-10-151-1/+6
* [TargetLowering] SimplifyDemandedBits - rename demanded mask args. NFCI.Simon Pilgrim2018-10-101-80/+89
* [TargetLowering] SimplifyDemandedBits - pull out repeated getOperands. NFCI.Simon Pilgrim2018-10-101-119/+119
* [TargetLowering] Add root node back to work list after successful SimplifyDem...Simon Pilgrim2018-10-101-2/+6
* [SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG and CONCAT_VECTORS support to Sim...Simon Pilgrim2018-10-091-0/+30
* [SelectionDAG] Respect multiple uses in SimplifyDemandedBits to SimplifyDeman...Simon Pilgrim2018-10-071-1/+1
* [SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts simplif...Simon Pilgrim2018-10-061-10/+46
* [CodeGen] Enable tail calls for functions with NonNull attributes.David Green2018-09-261-1/+3
* DAG: Fix expansion of unaligned FP loads and storesMatt Arsenault2018-09-131-4/+6
* [SelectionDAG] enhance vector demanded elements to look at a vector select co...Sanjay Patel2018-09-091-4/+12
* [CodeGen] Fix remaining zext() assertions in SelectionDAGScott Linder2018-09-041-14/+12
* [DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted patternRoman Lebedev2018-09-021-4/+18
* [TargetLowering] Add BuildSDiv support for division by one or negone.Simon Pilgrim2018-08-211-15/+27
* [TargetLowering] Disable BuildSDiv division by one or negone.Simon Pilgrim2018-08-201-1/+2
* [TargetLowering] Add support for non-uniform vectors to BuildSDIVSimon Pilgrim2018-08-161-10/+24
* [TargetLowering] Refactor BuildSDIV in preparation for D50765. NFCI.Simon Pilgrim2018-08-161-24/+36
* DAG: Use getObjectOffset helperMatt Arsenault2018-08-151-4/+1
* [TargetLowering] Minor cleanup of TargetLowering::BuildSDIV. NFCI.Simon Pilgrim2018-08-151-21/+20
* [TargetLowering] Minor refactor to TargetLowering::BuildUDIV to merge scalar/...Simon Pilgrim2018-08-151-41/+31
* [TargetLowering] Add support for non-uniform vectors to BuildExactSDIVSimon Pilgrim2018-08-151-12/+24
* [TargetLowering] Simplify one of the special cases in SimplifyDemandedBits fo...Craig Topper2018-08-121-21/+21
* [TargetLowering] Use APInt::isSubsetOf to simplify some code. NFCCraig Topper2018-08-121-1/+1
* [TargetLowering] Add BuildSDIVPattern helper to BuildExactSDIV (NFCI).Simon Pilgrim2018-08-091-14/+23
* [TargetLowering] BuildUDIV - Add support for divide by one (PR38477)Simon Pilgrim2018-08-081-7/+8
* [TargetLowering] Remove APInt divisor argument from BuildExactSDIV (NFCI).Simon Pilgrim2018-08-081-14/+22
* [TargetLowering] BuildUDIV - Early out for divide by one (PR38477)Simon Pilgrim2018-08-081-0/+4
* [TargetLowering] Use pre-computed Shift value type in BuildUDIV (NFCI)Simon Pilgrim2018-08-071-9/+5
* [TargetLowering] Add support for non-uniform vectors to BuildUDIVSimon Pilgrim2018-08-071-45/+115
* DAG: Enhance isKnownNeverNaNMatt Arsenault2018-08-031-0/+13
* [TargetLowering] Generalise BuildSDIV functionSimon Pilgrim2018-08-031-2/+8
* Test commit.Hsiangkai Wang2018-07-311-1/+1
* [DAGCombiner][TargetLowering] Pass a SmallVector instead of a std::vector to ...Craig Topper2018-07-301-5/+5
* [TargetLowering] In BuildSDIV, add the MULHS/SMUL_LOHI to the Created vector.Craig Topper2018-07-301-0/+3
* [DAGCombiner][PowerPC][AArch64] Pass Created vector by reference to BuildSDIV...Craig Topper2018-07-301-1/+1
* [SelectionDAG] Pass std::vector by reference instead of by pointer to BuildSD...Craig Topper2018-07-281-16/+12
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