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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-08-03 18:27:52 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-08-03 18:27:52 +0000 |
commit | c3dc8e65e250831173f1f9b6b7c0718e2b4d56c4 (patch) | |
tree | 1450d951d5feab5cbdc23cc731cc92ae4ec66ac7 /llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
parent | ed69e1bc98c7bd3c9e4ad285915ff6422d68a8ba (diff) | |
download | bcm5719-llvm-c3dc8e65e250831173f1f9b6b7c0718e2b4d56c4.tar.gz bcm5719-llvm-c3dc8e65e250831173f1f9b6b7c0718e2b4d56c4.zip |
DAG: Enhance isKnownNeverNaN
Add a parameter for testing specifically for
sNaNs - at least one instruction pattern on AMDGPU
needs to check specifically for this.
Also handle more cases, and add a target hook
for custom nodes, similar to the hooks for known
bits.
llvm-svn: 338910
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 1b0818d3428..aa5ed000d5e 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1711,6 +1711,19 @@ bool TargetLowering::SimplifyDemandedVectorEltsForTargetNode( return false; } +bool TargetLowering::isKnownNeverNaNForTargetNode(SDValue Op, + const SelectionDAG &DAG, + bool SNaN, + unsigned Depth) const { + assert((Op.getOpcode() >= ISD::BUILTIN_OP_END || + Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || + Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || + Op.getOpcode() == ISD::INTRINSIC_VOID) && + "Should use isKnownNeverNaN if you don't know whether Op" + " is a target node!"); + return false; +} + // FIXME: Ideally, this would use ISD::isConstantSplatVector(), but that must // work with truncating build vectors and vectors with elements of less than // 8 bits. |