summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Remove the SmallVector ctor that converts from a SmallVectorImpl. ThisChris Lattner2008-04-281-48/+53
| | | | | | | | | | conversion open the door for many nasty implicit conversion issues, and can be easily solved by initializing with (V.begin(), V.end()) when needed. This patch includes many small cleanups for sdisel also. llvm-svn: 50340
* switch RegsForValue::Regs to be a SmallVector to avoidChris Lattner2008-04-281-4/+4
| | | | | | heap thrash on tiny (usually single-element) vectors. llvm-svn: 50335
* move static function out of anon namespace, no functionality change.Chris Lattner2008-04-271-25/+23
| | | | llvm-svn: 50330
* Another step to getting multiple result inline asm to work.Chris Lattner2008-04-271-6/+14
| | | | llvm-svn: 50329
* Implement a signficant optimization for inline asm:Chris Lattner2008-04-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | When choosing between constraints with multiple options, like "ir", test to see if we can use the 'i' constraint and go with that if possible. This produces more optimal ASM in all cases (sparing a register and an instruction to load it), and fixes inline asm like this: void test () { asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14)); } Previously we would dump "42" into a memory location (which is ok for the 'm' constraint) which would cause a problem because the 'c' modifier is not valid on memory operands. Isn't it great how inline asm turns 'missed optimization' into 'compile failed'?? Incidentally, this was the todo in PowerPC/2007-04-24-InlineAsm-I-Modifier.ll Please do NOT pull this into Tak. llvm-svn: 50315
* isa+cast -> dyn_castChris Lattner2008-04-271-4/+2
| | | | llvm-svn: 50314
* Move a bunch of inline asm code out of line.Chris Lattner2008-04-271-1/+1
| | | | llvm-svn: 50313
* Remove the code from CodeGenPrepare that moved getresult instructionsDan Gohman2008-04-251-83/+156
| | | | | | | | | | | to the block that defines their operands. This doesn't work in the case that the operand is an invoke, because invoke is a terminator and must be the last instruction in a block. Replace it with support in SelectionDAGISel for copying struct values into sequences of virtual registers. llvm-svn: 50279
* Use isa instead of dyn_cast.Dan Gohman2008-04-231-1/+1
| | | | llvm-svn: 50181
* Add support to codegen for getresult instructions with undef operands.Dan Gohman2008-04-231-2/+7
| | | | llvm-svn: 50180
* Change Divided flag to Split, as suggested by EvanNicolas Geoffray2008-04-151-2/+2
| | | | llvm-svn: 49715
* Fix /test/CodeGen/PowerPC/big-endian-actual-args.ll for linux/ppc32Nicolas Geoffray2008-04-141-4/+4
| | | | llvm-svn: 49652
* Add a divided flag for the first piece of an argument divided into mulitple ↵Nicolas Geoffray2008-04-131-2/+7
| | | | | | parts. Fixes PR1643 llvm-svn: 49611
* Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not LegalDan Gohman2008-04-121-245/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | on any current target and aren't optimized in DAGCombiner. Instead of using intermediate nodes, expand the operations, choosing between simple loads/stores, target-specific code, and library calls, immediately. Previously, the code to emit optimized code for these operations was only used at initial SelectionDAG construction time; now it is used at all times. This fixes some cases where rep;movs was being used for small copies where simple loads/stores would be better. This also cleans up code that checks for alignments less than 4; let the targets make that decision instead of doing it in target-independent code. This allows x86 to use rep;movs in low-alignment cases. Also, this fixes a bug that resulted in the use of rep;stos for memsets of 0 with non-constant memory size when the alignment was at least 4. It's better to use the library in this case, which can be significantly faster when the size is large. This also preserves more SourceValue information when memory intrinsics are lowered into simple loads/stores. llvm-svn: 49572
* Make sure both PendingLoads and PendingExports are flushedDale Johannesen2008-04-041-1/+4
| | | | | | | | | | before an invoke. Failure to do this causes references in the landing pad to variables that were not set. Fixes g++.dg/eh/delayslot1.C g++.dg/eh/fp-regs.C g++.old-deja/g++.brendan/eh1.C llvm-svn: 49243
* Recommitting EH patch; this should answer most of theDale Johannesen2008-04-021-51/+41
| | | | | | | | | | | | | | | review feedback. -enable-eh is still accepted but doesn't do anything. EH intrinsics use Dwarf EH if the target supports that, and are handled by LowerInvoke otherwise. The separation of the EH table and frame move data is, I think, logically figured out, but either one still causes full EH info to be generated (not sure how to split the metadata correctly). MachineModuleInfo::needsFrameInfo is no longer used and is removed. llvm-svn: 49064
* Revert 49006 for the moment.Dale Johannesen2008-04-011-13/+8
| | | | llvm-svn: 49046
* Emit exception handling info for functions which areDale Johannesen2008-03-311-8/+13
| | | | | | | | | | | not marked nounwind, or for all functions when -enable-eh is set, provided the target supports Dwarf EH. llvm-gcc generates nounwind in the right places; other FEs will need to do so also. Given such a FE, -enable-eh should no longer be needed. llvm-svn: 49006
* Fix "Control reaches the end of non-void function" warnings, Chris Lattner2008-03-301-0/+1
| | | | | | patch by David Chisnall. llvm-svn: 48963
* Avoid creating chain dependencies from CopyToReg nodes to load and storeDan Gohman2008-03-271-54/+72
| | | | | | | | | | | | | | | | | | nodes. This doesn't currently have much impact the generated code, but it does produce simpler-looking SelectionDAGs, and consequently simpler-looking ScheduleDAGs, because there are fewer spurious dependencies. In particular, CopyValueToVirtualRegister now uses the entry node as the input chain dependency for new CopyToReg nodes instead of calling getRoot and depending on the most recent memory reference. Also, rename UnorderedChains to PendingExports and pull it up from being a local variable in SelectionDAGISel::BuildSelectionDAG to being a member variable of SelectionDAGISel, so that it doesn't have to be passed around to all the places that need it. llvm-svn: 48893
* Introduce a new node for holding call argumentDuncan Sands2008-03-211-42/+32
| | | | | | | | | | | | | | | | | flags. This is needed by the new legalize types infrastructure which wants to expand the 64 bit constants previously used to hold the flags on 32 bit machines. There are two functional changes: (1) in LowerArguments, if a parameter has the zext attribute set then that is marked in the flags; before it was being ignored; (2) PPC had some bogus code for handling two word arguments when using the ELF 32 ABI, which was hard to convert because of the bogusness. As suggested by the original author (Nicolas Geoffray), I've disabled it for the moment. Tested with "make check" and the Ada ACATS testsuite. llvm-svn: 48640
* Do not generate special entries in the dwarf ehDuncan Sands2008-03-141-6/+2
| | | | | | table for nounwind calls. llvm-svn: 48373
* Don't try to extract an i32 from an f64. ThisDuncan Sands2008-03-121-10/+16
| | | | | | | | | | | | getCopyToParts problem was noticed by the new LegalizeTypes infrastructure. In order to avoid this kind of thing in the future I've added a check that EXTRACT_ELEMENT is only used with integers. Once LegalizeTypes is up and running most likely BUILD_PAIR and EXTRACT_ELEMENT can be removed, in favour of using apints instead. llvm-svn: 48294
* Initial codegen support for functions and calls with multiple return values.Dan Gohman2008-03-111-18/+51
| | | | llvm-svn: 48244
* Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC'sScott Michel2008-03-101-3/+3
| | | | | | | | return ValueType can depend its operands' ValueType. This is a cosmetic change, no functionality impacted. llvm-svn: 48145
* Increase ISD::ParamFlags to 64 bits. Increase the ByValSizeDale Johannesen2008-03-101-13/+19
| | | | | | | | | | field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) llvm-svn: 48122
* remove an extraneous (and ugly) default argument, thanks Duncan.Chris Lattner2008-03-091-2/+1
| | | | llvm-svn: 48117
* fp_round's produced by getCopyFromParts should always be exact, becauseChris Lattner2008-03-091-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | they are produced by calls (which are known exact) and by cross block copies which are known to be produced by extends. This improves: define double @test2() { %tmp85 = call double asm sideeffect "fld0", "={st(0)}"() ret double %tmp85 } from: _test2: subl $20, %esp # InlineAsm Start fld0 # InlineAsm End fstpl 8(%esp) movsd 8(%esp), %xmm0 movsd %xmm0, (%esp) fldl (%esp) addl $20, %esp #FP_REG_KILL ret to: _test2: # InlineAsm Start fld0 # InlineAsm End #FP_REG_KILL ret by avoiding a f64 <-> f80 trip llvm-svn: 48108
* extend fp values with FP_EXTEND not FP_ROUND.Chris Lattner2008-03-091-3/+6
| | | | llvm-svn: 48097
* Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ↵Evan Cheng2008-03-081-4/+10
| | | | | | and prefetchnta instructions. llvm-svn: 48042
* Use the new APInt-enabled form of getConstant instead of convertingDan Gohman2008-02-291-1/+1
| | | | | | an APInt into a uint64_t to call getConstant. llvm-svn: 47742
* Refactor inline asm constraint matching code out of SDIsel into TargetLowering.Evan Cheng2008-02-261-91/+15
| | | | llvm-svn: 47587
* Convert MaskedValueIsZero and all its users to use APInt. Also addDan Gohman2008-02-251-10/+10
| | | | | | a SignBitIsZero function to simplify a common use case. llvm-svn: 47561
* Pass alignment on ByVal parameters, from FE, allDale Johannesen2008-02-221-0/+9
| | | | | | the way through. It is now used for codegen. llvm-svn: 47484
* Make the clobber analysis a bit more smart: we only are careful about Chris Lattner2008-02-211-3/+13
| | | | | | | early clobbers if the clobber list contains a *register* not some thing like {memory}, {dirflag} etc. llvm-svn: 47457
* Treat clobber operands like early clobbers: if we haveChris Lattner2008-02-211-0/+16
| | | | | | | | | any, we force sdisel to do all regalloc for an asm. This leads to gross but correct codegen. This fixes the rest of PR2078. llvm-svn: 47454
* Atomic op support. If any gcc test uses __sync builtins, it might start ↵Andrew Lenharth2008-02-211-1/+33
| | | | | | failing on archs that haven't implemented them yet llvm-svn: 47430
* Add support for matching mem operands. This fixes PR1133, patch byChris Lattner2008-02-211-1/+7
| | | | | | Eli Friedman. This implements CodeGen/Generic/2008-02-20-MatchingMem.ll. llvm-svn: 47428
* Fix a (harmless) but where vregs were added to the used reg lists for Chris Lattner2008-02-211-9/+26
| | | | | | | | | | inline asms. Fix PR2078 by marking aliases of registers used when a register is marked used. This prevents EAX from being allocated when AX is listed in the clobber set for the asm. llvm-svn: 47426
* assert is more effective reminder then FIXME tag for unimplemented features.Devang Patel2008-02-201-1/+1
| | | | llvm-svn: 47388
* Update gcc 4.3 warnings fix patch with recent head changesAnton Korobeynikov2008-02-201-1/+1
| | | | llvm-svn: 47368
* Add GetResultInst. First step for multiple return value support.Devang Patel2008-02-191-0/+4
| | | | llvm-svn: 47348
* llvm.memory.barrier, and impl for x86 and alphaAndrew Lenharth2008-02-161-0/+9
| | | | llvm-svn: 47204
* In TargetLowering::LowerCallTo, don't assert thatDuncan Sands2008-02-141-10/+16
| | | | | | | | | | | | | | | | | the return value is zero-extended if it isn't sign-extended. It may also be any-extended. Also, if a floating point value was returned in a larger floating point type, pass 1 as the second operand to FP_ROUND, which tells it that all the precision is in the original type. I think this is right but I could be wrong. Finally, when doing libcalls, set isZExt on a parameter if it is "unsigned". Currently isSExt is set when signed, and nothing is set otherwise. This should be right for all calls to standard library routines. llvm-svn: 47122
* In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower thisChris Lattner2008-02-131-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | node as soon as we create it in SDISel. Previously we would lower it in legalize. The problem with this is that it only exposes the argument loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2 can hack on them. This causes us to miss some optimizations because datatype expansion also happens here. Exposing the loads early allows us to do optimizations on them. For example we now compile arg-cast.ll to: _foo: movl $2147483647, %eax andl 8(%esp), %eax ret where we previously produced: _foo: subl $12, %esp movsd 16(%esp), %xmm0 movsd %xmm0, (%esp) movl $2147483647, %eax andl 4(%esp), %eax addl $12, %esp ret It might also make sense to do this for ISD::CALL nodes, which have implicit stores on many targets. llvm-svn: 47054
* Generalize getCopyFromParts and getCopyToParts toDuncan Sands2008-02-121-113/+215
| | | | | | | | | | | | handle arbitrary precision integers and any number of parts. For example, on a 32 bit machine an i50 corresponds to two i32 parts. getCopyToParts will extend the i50 to an i64 then write half of the i64 to each part; getCopyFromParts will combine the two i32 parts into an i64 then truncate the result to i50. llvm-svn: 47024
* Generalize the handling of call and return arguments,Duncan Sands2008-02-111-136/+85
| | | | | | | in preparation for apint support. These changes are intended to have no functional effect. llvm-svn: 46967
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-6/+7
| | | | llvm-svn: 46930
* SDIsel processes llvm.dbg.declare by recording the variable debug ↵Evan Cheng2008-02-021-6/+4
| | | | | | | | | information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes. For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time. llvm-svn: 46659
* Remove the nasty LABEL hack with a much less evil one. Now ↵Evan Cheng2008-02-011-6/+14
| | | | | | llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. llvm-svn: 46635
OpenPOWER on IntegriCloud