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authorAndrew Lenharth <andrewl@lenharth.org>2008-02-16 01:24:58 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2008-02-16 01:24:58 +0000
commit9b254eed320283371ee43f900e76794c3991957e (patch)
treed5b65d5cff5240a980e09ee4d6cd995ee077bb79 /llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
parent27055194b769d52c89fead4a4dc3614266fa59ba (diff)
downloadbcm5719-llvm-9b254eed320283371ee43f900e76794c3991957e.tar.gz
bcm5719-llvm-9b254eed320283371ee43f900e76794c3991957e.zip
llvm.memory.barrier, and impl for x86 and alpha
llvm-svn: 47204
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index b3d7fbfcf99..7b01d639030 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -3046,6 +3046,15 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
DAG.setRoot(DAG.getNode(ISD::TRAP, MVT::Other, getRoot()));
return 0;
}
+ case Intrinsic::memory_barrier: {
+ SDOperand Ops[6];
+ Ops[0] = getRoot();
+ for (int x = 1; x < 6; ++x)
+ Ops[x] = getValue(I.getOperand(x));
+
+ DAG.setRoot(DAG.getNode(ISD::MEMBARRIER, MVT::Other, &Ops[0], 6));
+ return 0;
+ }
}
}
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