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path: root/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
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* Cleanup dump() functions.Matthias Braun2017-01-281-5/+5
| | | | | | | | | | | | | | | | | | We had various variants of defining dump() functions in LLVM. Normalize them (this should just consistently implement the things discussed in http://lists.llvm.org/pipermail/cfe-dev/2014-January/034323.html For reference: - Public headers should just declare the dump() method but not use LLVM_DUMP_METHOD or #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) - The definition of a dump method should look like this: #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void MyClass::dump() { // print stuff to dbgs()... } #endif llvm-svn: 293359
* Add iterator_range<regclass_iterator> to {Target,MC}RegisterInfo, NFCKrzysztof Parzyszek2017-01-251-6/+3
| | | | llvm-svn: 293077
* Use the range variant of find instead of unpacking begin/endDavid Majnemer2016-08-111-3/+2
| | | | | | | | | If the result of the find is only used to compare against end(), just use is_contained instead. No functionality change is intended. llvm-svn: 278433
* rangify; NFCISanjay Patel2016-02-031-159/+129
| | | | llvm-svn: 259722
* Replace uint16_t with the MCPhysReg typedef in many places. A lot of ↵Craig Topper2015-12-051-6/+6
| | | | | | physical register arrays already use this typedef. llvm-svn: 254843
* Fix accidental off by one changeFiona Glaser2015-12-021-1/+1
| | | | | | Didn't break any tests, but did unnecessary extra work. llvm-svn: 254529
* Scheduler / Regalloc: use unique_ptr[] instead of std::vectorFiona Glaser2015-12-021-11/+13
| | | | | | | | | vector.resize() is significantly slower than memset in many STLs and the cost of initializing these vectors is significant on targets with many registers. Since we don't need the overhead of a vector, use a simple unique_ptr instead. llvm-svn: 254526
* Convert a bunch of loops to foreach. NFC.Pete Cooper2015-06-261-16/+14
| | | | | | This uses the new SDNode::op_values() iterator range committed in r240805. llvm-svn: 240817
* Fix instruction scheduling live register trackingPawel Bylica2015-06-241-8/+17
| | | | | | | | | | | | | | | | | | | Summary: This patch fixes PR23405 (https://llvm.org/bugs/show_bug.cgi?id=23405). During a node unscheduling an entry in LiveRegGens can be replaced with a new value. That corrupts the live reg tracking and LiveReg* structure is not cleared as should be during unscheduling. Problematic condition that enforces Gen replacement is `I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight()`. This condition should be checked only if LiveRegGen was set in current node unscheduling. Test Plan: Regression test included. Reviewers: hfinkel, atrick Reviewed By: atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9993 llvm-svn: 240538
* Use 'override/final' instead of 'virtual' for overridden methodsAlexander Kornienko2015-04-111-1/+1
| | | | | | | | | | | | | | The patch is generated using clang-tidy misc-use-override check. This command was used: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py \ -checks='-*,misc-use-override' -header-filter='llvm|clang' \ -j=32 -fix -format http://reviews.llvm.org/D8925 llvm-svn: 234679
* Fix a bug in SelectionDAG scheduling backtracking code: PR22304.Andrew Trick2015-03-271-1/+2
| | | | | | | | | | | | | | | It can happen (by line CurSU->isPending = true; // This SU is not in AvailableQueue right now.) that a SUnit is mark as available but is not in the AvailableQueue. For SUnit being selected for scheduling both conditions must be met. This patch mainly defensively protects from invalid removing a node from a queue. Sometimes nodes are marked isAvailable but are not in the queue because they have been defered due to some hazard. Patch by Pawel Bylica! llvm-svn: 233351
* Update SetVector to rely on the underlying set's insert to return a ↵David Blaikie2014-11-191-3/+4
| | | | | | | | | | | | | pair<iterator, bool> This is to be consistent with StringSet and ultimately with the standard library's associative container insert function. This lead to updating SmallSet::insert to return pair<iterator, bool>, and then to update SmallPtrSet::insert to return pair<iterator, bool>, and then to update all the existing users of those functions... llvm-svn: 222334
* Move register class name strings to a single array in MCRegisterInfo to ↵Craig Topper2014-11-171-2/+2
| | | | | | | | reduce static table size and number of relocation entries. Indices into the table are stored in each MCRegisterClass instead of a pointer. A new method, getRegClassName, is added to MCRegisterInfo and TargetRegisterInfo to lookup the string in the table. llvm-svn: 222118
* Convert some EVTs to MVTs where only a SimpleValueType is needed.Craig Topper2014-11-161-6/+6
| | | | llvm-svn: 222109
* ScheduleDAG: record PhysReg dependencies represented by CopyFromReg nodesTim Northover2014-10-231-7/+13
| | | | | | | | | | | | | | | x86's CMPXCHG -> EFLAGS consumer wasn't being recorded as a real EFLAGS dependency because it was represented by a pair of CopyFromReg(EFLAGS) -> CopyToReg(EFLAGS) nodes. ScheduleDAG was expecting the source to be an implicit-def on the instruction, where the result numbers in the DAG and the Uses list in TableGen matched up precisely. The Copy notation seems much more robust, so this patch extends ScheduleDAG rather than refactoring x86. Should fix PR20376. llvm-svn: 220529
* Remove more calls to getSubtargetImpl from the schedulers andEric Christopher2014-10-091-17/+14
| | | | | | remove cached or unnecessary TargetMachines. llvm-svn: 219387
* Cache TargetLowering on SelectionDAGISel and update previousEric Christopher2014-10-081-2/+2
| | | | | | calls to getTargetLowering() with the cached variable. llvm-svn: 219284
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-10/+12
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* fixed typoSanjay Patel2014-07-141-1/+1
| | | | llvm-svn: 212966
* The hazard recognizer only needs a subtarget, not a target machineEric Christopher2014-06-131-1/+2
| | | | | | so make it take one. Fix up all users accordingly. llvm-svn: 210948
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-1/+1
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. llvm-svn: 207511
* [Modules] Remove potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | | | | | | define below all header includes in the lib/CodeGen/... tree. While the current modules implementation doesn't check for this kind of ODR violation yet, it is likely to grow support for it in the future. It also removes one layer of macro pollution across all the included headers. Other sub-trees will follow. llvm-svn: 206837
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper2014-04-141-35/+35
| | | | | | instead of comparing to nullptr. llvm-svn: 206142
* Remove copy ctors that did the same thing as the default one.Benjamin Kramer2014-03-111-8/+0
| | | | | | | The code added nothing but potentially disabled move semantics and made types non-trivially copyable. llvm-svn: 203563
* [C++11] Add 'override' keyword to virtual methods that override their base ↵Craig Topper2014-03-081-15/+15
| | | | | | class. llvm-svn: 203339
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-3/+3
| | | | | | Remove the old functions. llvm-svn: 202636
* Fix spelling intruction -> instruction.Robert Wilhelm2013-09-281-1/+1
| | | | llvm-svn: 191610
* Add 'const' qualifier to some arrays.Craig Topper2013-07-151-1/+2
| | | | llvm-svn: 186312
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector ↵Craig Topper2013-07-141-11/+11
| | | | | | size. llvm-svn: 186274
* Cache the TargetLowering info object as a pointer.Bill Wendling2013-06-061-2/+2
| | | | | | | Caching it as a pointer allows us to reset it if the TargetMachine object changes. llvm-svn: 183361
* Track IR ordering of SelectionDAG nodes 3/4.Andrew Trick2013-05-251-1/+1
| | | | | | | Remove the old IR ordering mechanism and switch to new one. Fix unit test failures. llvm-svn: 182704
* Revert "pre-RA-sched: fix TargetOpcode usage"Christian Konig2013-03-201-18/+12
| | | | | | | | | | | This reverts commit 06091513c283c863296f01cc7c2e86b56bb50d02. The code is obviously wrong, but the trivial fix causes inefficient code generation on X86. Somebody with more knowledge of the code needs to take a look here. Signed-off-by: Christian König <christian.koenig@amd.com> llvm-svn: 177529
* pre-RA-sched: fix TargetOpcode usageChristian Konig2013-03-201-12/+18
| | | | | | | TargetOpcodes need to be treaded as Machine- and not ISD-Opcodes. Signed-off-by: Christian König <christian.koenig@amd.com> llvm-svn: 177518
* pre-RA-sched debug-only fixAndrew Trick2013-03-071-2/+4
| | | | llvm-svn: 176638
* pre-RA-sched assertion fix. This bug was exposed by r176037.Andrew Trick2013-03-071-3/+0
| | | | | | | | | | | | | rdar:13370002 [pre-RA-sched] assertion: released too many times I tracked this down to an earlier hack that is no longer applicable and interfered with normal scheduler logic. With the changes in r176037, it was causing an instruction to be scheduled multiple times. I have an external test case that I tried hard to reduce and failed. I can't even reproduce with llc. llvm-svn: 176636
* pre-RA-sched fix: only reevaluate physreg interferences when necessary.Andrew Trick2013-02-251-33/+61
| | | | | | Fixes rdar:13279013: scheduler was blowing up on select instructions. llvm-svn: 176037
* Add a special handling case for untyped CopyFromReg node in GetCostForDef() ↵Weiming Zhao2013-01-291-1/+11
| | | | | | of ScheduleDAGRRList llvm-svn: 173833
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-2/+2
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* Change TargetLowering::getRepRegClassFor to take an MVT, instead ofPatrik Hagglund2012-12-131-8/+8
| | | | | | | | EVT. Accordingly, change RegDefIter to contain MVTs instead of EVTs. llvm-svn: 170140
* Revert EVT->MVT changes, r169836-169851, due to buildbot failures.Patrik Hagglund2012-12-111-8/+8
| | | | llvm-svn: 169854
* Change TargetLowering::getRepRegClassFor to take an MVT, instead ofPatrik Hagglund2012-12-111-8/+8
| | | | | | | | EVT. Accordingly, change RegDefIter to contain MVTs instead of EVTs. llvm-svn: 169838
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-10/+10
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* misched: Infrastructure for weak DAG edges.Andrew Trick2012-11-121-1/+1
| | | | | | | | This adds support for weak DAG edges to the general scheduling infrastructure in preparation for MachineScheduler support for heuristics based on weak edges. llvm-svn: 167738
* ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.Andrew Trick2012-11-061-22/+14
| | | | | | | This is in preparation for adding "weak" DAG edges, but generally simplifies the design. llvm-svn: 167435
* Move TargetData to DataLayout.Micah Villmow2012-10-081-1/+1
| | | | llvm-svn: 165402
* Release build: guard dump functions withManman Ren2012-09-111-2/+2
| | | | | | | | "#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)" No functional change. Update r163339. llvm-svn: 163653
* Release build: guard dump functions with "ifndef NDEBUG"Manman Ren2012-09-061-0/+4
| | | | | | No functional change. llvm-svn: 163339
* Add a new optimization pass: Stack Coloring, that merges disjoint static ↵Nadav Rotem2012-09-061-0/+2
| | | | | | | | allocations (allocas). Allocas are known to be disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics). llvm-svn: 163299
* Fix a typo (the the => the)Sylvestre Ledru2012-07-231-1/+1
| | | | llvm-svn: 160621
* sdsched: Use the right heuristics when -mcpu is not provided and we have no ↵Andrew Trick2012-06-051-13/+12
| | | | | | | | itinerary. Use ILP heuristics for long latency instrs if no scoreboard exists. llvm-svn: 157978
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