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| author | Sanjay Patel <spatel@rotateright.com> | 2014-07-14 18:21:07 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2014-07-14 18:21:07 +0000 |
| commit | b49bf168f25b9500cae0992373dca30f040e6313 (patch) | |
| tree | 13d16ef20f1fff14251fea49e2be64a4e8d40943 /llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | |
| parent | c582f0137e1f84ee198228a3e329befd8db0c34a (diff) | |
| download | bcm5719-llvm-b49bf168f25b9500cae0992373dca30f040e6313.tar.gz bcm5719-llvm-b49bf168f25b9500cae0992373dca30f040e6313.zip | |
fixed typo
llvm-svn: 212966
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 13cfae7515b..dedca41c3aa 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1373,7 +1373,7 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() { Interferences.push_back(CurSU); } else { - assert(CurSU->isPending && "Intereferences are pending"); + assert(CurSU->isPending && "Interferences are pending"); // Update the interference with current live regs. LRegsPair.first->second = LRegs; } |
