bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
*	Be careful about scheduling nodes above previous calls. It increase usages of	Evan Cheng	2011-04-26	1	-1/+42
*	Fix typo	Evan Cheng	2011-04-26	1	-1/+1
*	In the pre-RA scheduler, maintain cmp+br proximity.	Andrew Trick	2011-04-14	1	-13/+53
*	Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor lat...	Andrew Trick	2011-04-13	1	-110/+176
*	Revert 129383. It causes some targets to hit a scheduler assert.	Andrew Trick	2011-04-12	1	-177/+111
*	PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.	Andrew Trick	2011-04-12	1	-111/+177
*	Added a check in the preRA scheduler for potential interference on a	Andrew Trick	2011-04-07	1	-4/+55
*	Fix for -pre-RA-sched=source.	Andrew Trick	2011-03-25	1	-0/+2
*	Ensure that def-side physreg copies are scheduled above any other uses	Andrew Trick	2011-03-23	1	-0/+9
*	whitespace	Andrew Trick	2011-03-23	1	-2/+2
*	Grammar-o.	Eric Christopher	2011-03-21	1	-1/+1
*	Re-commit 127368 and 127371. They are exonerated.	Evan Cheng	2011-03-10	1	-5/+11
*	Revert 127368 and 127371 for now.	Evan Cheng	2011-03-09	1	-11/+5
*	Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be more	Evan Cheng	2011-03-09	1	-5/+11
*	Fix typo, make helper static.	Benjamin Kramer	2011-03-09	1	-3/+3
*	Fix some latent bugs if the nodes are unschedulable. We'd gotten away	Eric Christopher	2011-03-08	1	-1/+6
*	Further improvements to pre-RA-sched=list-ilp.	Andrew Trick	2011-03-08	1	-17/+62
*	Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.	Cameron Zwarich	2011-03-07	1	-1/+1
*	Typo.	Eric Christopher	2011-03-06	1	-1/+1
*	Disable a couple of experimental heuristics to get the best results from the ...	Andrew Trick	2011-03-06	1	-2/+2
*	Be explicit with abs(). Visual Studio workaround.	Andrew Trick	2011-03-05	1	-4/+6
*	Missing comment.	Andrew Trick	2011-03-05	1	-0/+2
*	Increased the register pressure limit on x86_64 from 8 to 12	Andrew Trick	2011-03-05	1	-22/+143
*	Minor pre-RA-sched fixes and cleanup.	Andrew Trick	2011-03-04	1	-7/+15
*	Introducing a new method of tracking register pressure. We can't	Andrew Trick	2011-02-04	1	-111/+62
*	Remove a temporary workaround for a lencod miscompile. Depends on the fix in ...	Andrew Trick	2011-01-27	1	-2/+0
*	Temporarily workaround JM/lencod miscompile (SIGSEGV).	Andrew Trick	2011-01-24	1	-0/+2
*	Enable support for precise scheduling of the instruction selection	Andrew Trick	2011-01-21	1	-1/+1
*	Convert -enable-sched-cycles and -enable-sched-hazard to -disable	Andrew Trick	2011-01-21	1	-29/+31
*	Selection DAG scheduler register pressure heuristic fixes.	Andrew Trick	2011-01-20	1	-8/+27
*	Support for precise scheduling of the instruction selection DAG,	Andrew Trick	2011-01-14	1	-537/+663
*	Minor cleanup related to my latest scheduler changes.	Andrew Trick	2010-12-24	1	-3/+5
*	Fix a few cases where the scheduler is not checking for phys reg copies. The ...	Andrew Trick	2010-12-24	1	-3/+10
*	Various bits of framework needed for precise machine-level selection	Andrew Trick	2010-12-24	1	-60/+367
*	flags -> glue for selectiondag	Chris Lattner	2010-12-23	1	-6/+6
*	Reorganize ListScheduleBottomUp in preparation for modeling machine cycles an...	Andrew Trick	2010-12-23	1	-130/+153
*	Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows m...	Andrew Trick	2010-12-23	1	-17/+18
*	In CheckForLiveRegDef use TRI->getOverlaps.	Andrew Trick	2010-12-23	1	-6/+9
*	Fixes PR8823: add-with-overflow-128.ll	Andrew Trick	2010-12-23	1	-12/+33
*	In DelayForLiveRegsBottomUp, handle instructions that read and write	Andrew Trick	2010-12-21	1	-15/+4
*	whitespace	Andrew Trick	2010-12-21	1	-42/+42
*	rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for	Chris Lattner	2010-12-21	1	-5/+5
*	Fix a bug in the scheduler's handling of "unspillable" vregs.	Chris Lattner	2010-12-20	1	-1/+14
*	the result of CheckForLiveRegDef is dead, remove it.	Chris Lattner	2010-12-20	1	-12/+8
*	Two sets of changes. Sorry they are intermingled.	Evan Cheng	2010-11-03	1	-0/+8
*	Avoiding overly aggressive latency scheduling. If the two nodes share an	Evan Cheng	2010-10-29	1	-24/+69
*	The "excess register pressure" returned by HighRegPressure() is not accurate ...	Evan Cheng	2010-07-26	1	-41/+20
*	Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parame...	Duncan Sands	2010-07-26	1	-1/+2
*	Add comments.	Evan Cheng	2010-07-25	1	-4/+16
*	Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on	Bob Wilson	2010-07-25	1	-2/+2