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* When the register allocator runs out of registers, spill a physical register ↵Evan Cheng2008-03-111-6/+5
| | | | | | around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. llvm-svn: 48218
* variadic instructions don't have operand info for variadic arguments.Chris Lattner2008-03-111-1/+2
| | | | llvm-svn: 48208
* If a register operand comes from the variadic part of a node, don'tChris Lattner2008-03-111-4/+6
| | | | | | verify the register constraint matches what the instruction expects. llvm-svn: 48205
* Correctly clone FlaggedNodes.Dan Gohman2008-03-101-2/+1
| | | | llvm-svn: 48196
* Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng2008-03-101-15/+15
| | | | llvm-svn: 48167
* Allow insert_subreg into implicit, target-specific values. Christopher Lamb2008-03-101-15/+15
| | | | | | | Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. llvm-svn: 48130
* teach X86InstrInfo::copyRegToReg how to copy into ST(0) from Chris Lattner2008-03-091-15/+23
| | | | | | | | | | | | an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. llvm-svn: 48107
* Add ScheduleDAG support for copytoreg where the src/dst register areChris Lattner2008-03-091-16/+19
| | | | | | | | in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) llvm-svn: 48105
* fix 80 col violationChris Lattner2008-03-091-1/+2
| | | | llvm-svn: 48100
* Some improvements related to the computation of heights, depths of SUnits.Roman Levenstein2008-03-041-21/+93
| | | | | | | The basic idea is that all these algorithms are computing the longest paths from the root node or to the exit node. Therefore the existing implementation that uses and iterative and potentially exponential algorithm was changed to a well-known graph algorithm based on dynamic programming. It has a linear run-time. llvm-svn: 47884
* Rename isOperand() to isOperandOf() (and other similar methods). It always ↵Evan Cheng2008-03-041-1/+1
| | | | | | confuses me. llvm-svn: 47872
* Keep track how many commutes are performed by the scheduler.Evan Cheng2008-02-281-0/+4
| | | | llvm-svn: 47710
* Rename CountMemOperands to ComputeMemOperandsEnd to reflect whatDan Gohman2008-02-161-12/+9
| | | | | | | it actually does. Simplify CountOperands a little by reusing ComputeMemOperandsEnd. And reword some comments for both. llvm-svn: 47198
* Change how FP immediates are handled. Nate Begeman2008-02-141-0/+5
| | | | | | | | | | | | | | 1) ConstantFP is now expand by default 2) ConstantFP is not turned into TargetConstantFP during Legalize if it is legal. This allows ConstantFP to be handled like Constant, allowing for targets that can encode FP immediates as MachineOperands. As a bonus, fix up Itanium FP constants, which now correctly match, and match more constants! Hooray. llvm-svn: 47121
* From Chris' review: use isa instead of explicitly using classof.Dan Gohman2008-02-111-1/+1
| | | | llvm-svn: 46964
* From Chris' review: minor corrections in comments.Dan Gohman2008-02-111-2/+3
| | | | llvm-svn: 46963
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-22/+23
| | | | llvm-svn: 46930
* Re-apply the memory operand changes, with a fix for the staticDan Gohman2008-02-061-3/+25
| | | | | | | | initializer problem, a minor tweak to the way the DAGISelEmitter finds load/store nodes, and a renaming of the new PseudoSourceValue objects. llvm-svn: 46827
* SDIsel processes llvm.dbg.declare by recording the variable debug ↵Evan Cheng2008-02-021-0/+1
| | | | | | | | | information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes. For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time. llvm-svn: 46659
* Remove the nasty LABEL hack with a much less evil one. Now ↵Evan Cheng2008-02-011-22/+1
| | | | | | llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. llvm-svn: 46635
* Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and ↵Evan Cheng2008-01-311-25/+3
| | | | | | re-commit. llvm-svn: 46623
* Add a comment for a nasty short term hack.Evan Cheng2008-01-311-0/+4
| | | | llvm-svn: 46610
* Add an extra operand to LABEL nodes which distinguishes between debug, EH, ↵Evan Cheng2008-01-311-8/+6
| | | | | | or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. llvm-svn: 46609
* Add more thorough error checking for NULL register classes.Christopher Lamb2008-01-311-1/+2
| | | | llvm-svn: 46605
* Create a new class, MemOperand, for describing memory referencesDan Gohman2008-01-311-3/+25
| | | | | | | | | | | | | | | | in the backend. Introduce a new SDNode type, MemOperandSDNode, for holding a MemOperand in the SelectionDAG IR, and add a MemOperand list to MachineInstr, and code to manage them. Remove the offset field from SrcValueSDNode; uses of SrcValueSDNode that were using it are all all using MemOperandSDNode now. Also, begin updating some getLoad and getStore calls to use the PseudoSourceValue objects. Most of this was written by Florian Brander, some reorganization and updating to TOT by me. llvm-svn: 46585
* Treat the label for the first @llvm.dbg.stoppoint the same way as the ↵Evan Cheng2008-01-301-4/+4
| | | | | | | | | | dbg_func_start label. Make sure nothing else is inserted before them. Note this solution might be somewhat fragile since ISD::LABEL may be used for other purposes. If that ends up to be an issue, we may need to introduce a different node for debug labels. llvm-svn: 46571
* A semi-gross fix for a debug info issue. When inserting the "function start" ↵Evan Cheng2008-01-301-9/+26
| | | | | | label (i.e. first label in the entry block) take care to insert it at the beginning of the block. llvm-svn: 46568
* Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a ↵Evan Cheng2008-01-301-1/+1
| | | | | | | | proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert instruction at the end. llvm-svn: 46562
* Use empty() instead of comparing size() with zero.Dan Gohman2008-01-291-1/+1
| | | | llvm-svn: 46514
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-16/+16
| | | | | | | Make MachineInstr::getDesc return a reference instead of a pointer, since it can never be null. llvm-svn: 45695
* Rename all the M_* flags to be namespace qualified enums, and switch Chris Lattner2008-01-071-1/+1
| | | | | | | | all clients over to using predicates instead of these flags directly. These are now private values which are only to be used to statically initialize the tables. llvm-svn: 45692
* add more and significantly better comments to the rest of the machineinstrChris Lattner2008-01-071-1/+1
| | | | | | | flags that can be set. Add predicates for the ones lacking it, and switch some clients over to using the predicates instead of Flags directly. llvm-svn: 45690
* rename hasVariableOperands() -> isVariadic(). Add some comments.Chris Lattner2008-01-071-2/+2
| | | | | | | Evan, please review the comments I added to getNumDefs to make sure that they are accurate, thx. llvm-svn: 45687
* Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptorChris Lattner2008-01-071-14/+15
| | | | llvm-svn: 45680
* remove some uses of MachineOpCode, move getSchedClass Chris Lattner2008-01-071-2/+3
| | | | | | into TargetInstrDescriptor from TargetInstrInfo. llvm-svn: 45678
* Add predicates methods to TargetOperandInfo, and switch all clients Chris Lattner2008-01-071-4/+4
| | | | | | | over to using them, instead of diddling Flags directly. Change the various flags from const variables to enums. llvm-svn: 45677
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-1/+1
| | | | | | | | | | | | | | | that it is cheap and efficient to get. Move a variety of predicates from TargetInstrInfo into TargetInstrDescriptor, which makes it much easier to query a predicate when you don't have TII around. Now you can use MI->getDesc()->isBranch() instead of going through TII, and this is much more efficient anyway. Not all of the predicates have been moved over yet. Update old code that used MI->getInstrDescriptor()->Flags to use the new predicates in many places. llvm-svn: 45674
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-5/+5
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* update a couple of references to SSARegMap.Chris Lattner2007-12-311-1/+1
| | | | llvm-svn: 45468
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-23/+24
| | | | | | | | | | | | | | that "machine" classes are used to represent the current state of the code being compiled. Given this expanded name, we can start moving other stuff into it. For now, move the UsedPhysRegs and LiveIn/LoveOuts vectors from MachineFunction into it. Update all the clients to match. This also reduces some needless #includes, such as MachineModuleInfo from MachineFunction. llvm-svn: 45467
* use simplified operand addition methods.Chris Lattner2007-12-301-30/+22
| | | | llvm-svn: 45435
* Start using the simplified methods for adding operands.Chris Lattner2007-12-301-11/+11
| | | | llvm-svn: 45432
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Bug fix. Must also match ResNo when matching an operand with a user.Evan Cheng2007-12-141-1/+1
| | | | llvm-svn: 45028
* Make labels work in asm blocks; allow labels asDale Johannesen2007-11-051-3/+6
| | | | | | | parameters. Rename ValueRefList to ParamList in AsmParser, since its only use is for parameters. llvm-svn: 43734
* Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.Duncan Sands2007-11-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The meaning of getTypeSize was not clear - clarifying it is important now that we have x86 long double and arbitrary precision integers. The issue with long double is that it requires 80 bits, and this is not a multiple of its alignment. This gives a primitive type for which getTypeSize differed from getABITypeSize. For arbitrary precision integers it is even worse: there is the minimum number of bits needed to hold the type (eg: 36 for an i36), the maximum number of bits that will be overwriten when storing the type (40 bits for i36) and the ABI size (i.e. the storage size rounded up to a multiple of the alignment; 64 bits for i36). This patch removes getTypeSize (not really - it is still there but deprecated to allow for a gradual transition). Instead there is: (1) getTypeSizeInBits - a number of bits that suffices to hold all values of the type. For a primitive type, this is the minimum number of bits. For an i36 this is 36 bits. For x86 long double it is 80. This corresponds to gcc's TYPE_PRECISION. (2) getTypeStoreSizeInBits - the maximum number of bits that is written when storing the type (or read when reading it). For an i36 this is 40 bits, for an x86 long double it is 80 bits. This is the size alias analysis is interested in (getTypeStoreSize returns the number of bytes). There doesn't seem to be anything corresponding to this in gcc. (3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded up to a multiple of the alignment. For an i36 this is 64, for an x86 long double this is 96 or 128 depending on the OS. This is the spacing between consecutive elements when you form an array out of this type (getABITypeSize returns the number of bytes). This is TYPE_SIZE in gcc. Since successive elements in a SequentialType (arrays, pointers and vectors) need to be aligned, the spacing between them will be given by getABITypeSize. This means that the size of an array is the length times the getABITypeSize. It also means that GEP computations need to use getABITypeSize when computing offsets. Furthermore, if an alloca allocates several elements at once then these too need to be aligned, so the size of the alloca has to be the number of elements multiplied by getABITypeSize. Logically speaking this doesn't have to be the case when allocating just one element, but it is simpler to also use getABITypeSize in this case. So alloca's and mallocs should use getABITypeSize. Finally, since gcc's only notion of size is that given by getABITypeSize, if you want to output assembler etc the same as gcc then getABITypeSize is the size you want. Since a store will overwrite no more than getTypeStoreSize bytes, and a read will read no more than that many bytes, this is the notion of size appropriate for alias analysis calculations. In this patch I have corrected all type size uses except some of those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard cases). I will get around to auditing these too at some point, but I could do with some help. Finally, I made one change which I think wise but others might consider pointless and suboptimal: in an unpacked struct the amount of space allocated for a field is now given by the ABI size rather than getTypeStoreSize. I did this because every other place that reserves memory for a type (eg: alloca) now uses getABITypeSize, and I didn't want to make an exception for unpacked structs, i.e. I did it to make things more uniform. This only effects structs containing long doubles and arbitrary precision integers. If someone wants to pack these types more tightly they can always use a packed struct. llvm-svn: 43620
* EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG likeEvan Cheng2007-10-121-3/+0
| | | | | | | | | (almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. llvm-svn: 42899
* If a node that defines a physical register that is expensive to copy. TheEvan Cheng2007-10-051-28/+33
| | | | | | | | | scheduler will try a number of tricks in order to avoid generating the copies. This may not be possible in case the node produces a chain value that prevent movement. Try unfolding the load from the node before to allow it to be moved / cloned. llvm-svn: 42625
* Use empty() member functions when that's what's being tested for insteadDan Gohman2007-10-031-1/+1
| | | | | | of comparing begin() and end(). llvm-svn: 42585
* If two instructions are both two-address code, favors (schedule closer toEvan Cheng2007-09-281-5/+5
| | | | | | | terminator) the one that has a CopyToReg use. This fixes 2006-05-11-InstrSched.ll with -new-cc-modeling-scheme. llvm-svn: 42453
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