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| author | Chris Lattner <sabre@nondot.org> | 2008-01-07 02:39:19 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-01-07 02:39:19 +0000 |
| commit | e55e11561676c943d1042e35c0f6962a2eb30b9c (patch) | |
| tree | 39c803f8b4ef9eacc3eea7ac5bee6a1c9b065c2a /llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | |
| parent | c7e991b7c3353c6b3b5e724eb8a389763966b797 (diff) | |
| download | bcm5719-llvm-e55e11561676c943d1042e35c0f6962a2eb30b9c.tar.gz bcm5719-llvm-e55e11561676c943d1042e35c0f6962a2eb30b9c.zip | |
Add predicates methods to TargetOperandInfo, and switch all clients
over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
llvm-svn: 45677
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 3ef907ee1a1..e3e54c50a93 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -296,9 +296,9 @@ static const TargetRegisterClass *getInstrOperandRegClass( assert((II->Flags & M_VARIABLE_OPS)&& "Invalid operand # of instruction"); return NULL; } - const TargetOperandInfo &toi = II->OpInfo[Op]; - return (toi.Flags & M_LOOK_UP_PTR_REG_CLASS) - ? TII->getPointerRegClass() : MRI->getRegClass(toi.RegClass); + if (II->OpInfo[Op].isLookupPtrRegClass()) + return TII->getPointerRegClass(); + return MRI->getRegClass(II->OpInfo[Op].RegClass); } void ScheduleDAG::EmitCopyFromReg(SDNode *Node, unsigned ResNo, @@ -435,7 +435,7 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDOperand Op, unsigned VReg = getVR(Op, VRBaseMap); const TargetInstrDescriptor *TID = MI->getDesc(); bool isOptDef = (IIOpNum < TID->numOperands) - ? (TID->OpInfo[IIOpNum].Flags & M_OPTIONAL_DEF_OPERAND) : false; + ? (TID->OpInfo[IIOpNum].isOptionalDef()) : false; MI->addOperand(MachineOperand::CreateReg(VReg, isOptDef)); // Verify that it is right. |
