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authorEvan Cheng <evan.cheng@apple.com>2007-10-12 08:50:34 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-10-12 08:50:34 +0000
commitaa2d6ef81d4137fa690672a13769cd985948b58c (patch)
tree7a05de69ae4d34ac9e496f12457dc5f2a2ee917e /llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
parent89d59169216f2573d37b3335ba19dfab5887b5f0 (diff)
downloadbcm5719-llvm-aa2d6ef81d4137fa690672a13769cd985948b58c.tar.gz
bcm5719-llvm-aa2d6ef81d4137fa690672a13769cd985948b58c.zip
EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub- register uses which adds subtle complications to load folding, spiller rewrite, etc. llvm-svn: 42899
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp3
1 files changed, 0 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index b616b7e4825..bb5379c3491 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -567,9 +567,6 @@ void ScheduleDAG::EmitSubregNode(SDNode *Node,
// TODO: If the node is a use of a CopyFromReg from a physical register
// fold the extract into the copy now
- // TODO: Add tracking info to SSARegMap of which vregs are subregs
- // to allow coalescing in the allocator
-
// Create the extract_subreg machine instruction.
MachineInstr *MI =
new MachineInstr(BB, TII->get(TargetInstrInfo::EXTRACT_SUBREG));
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