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path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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* [TargetLowering] Add code size information on isFPImmLegal. NFCAdhemerval Zanella2019-03-181-1/+2
* [SDAG][AArch64] Legalize VECREDUCENikita Popov2019-03-111-0/+31
* [LegalizeDAG] Use APInt::getSplat helper to create bitreverse masks. NFCI.Simon Pilgrim2019-02-261-10/+6
* [LegalizeDAG] Expand SADDO/SSUBO using SADDSAT/SSUBSAT (PR37763)Simon Pilgrim2019-02-261-5/+17
* [SDAG] Support vector UMULO/SMULONikita Popov2019-02-201-3/+5
* [SelectionDAG] Extract [US]MULO expansion into TL method; NFCNikita Popov2019-02-171-147/+3
* [SelectionDAG] Fix return calling convention in expansion of ?MULOwhitequark2019-02-121-3/+9
* Revert "[SelectionDAG] Extract [US]MULO expansion into TL method; NFC"Nikita Popov2019-02-091-3/+141
* [SelectionDAG] Extract [US]MULO expansion into TL method; NFCNikita Popov2019-02-091-141/+3
* [Intrinsic] Unsigned Fixed Point Multiplication IntrinsicLeonard Chan2019-02-041-1/+3
* [TargetLowering] Rename getExpandedFixedPointMultiplication to expandFixedPoi...Simon Pilgrim2019-01-241-1/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Allow FP types for atomicrmw xchgMatt Arsenault2019-01-171-0/+18
* [LegalizeDAG] Remove 'NeedInvert' code from expansion of BR_CC. Replace with ...Craig Topper2019-01-131-4/+1
* [X86] Rename overly verbose method; NFCNikita Popov2019-01-131-5/+3
* [X86][AARCH64] Improve ISD::ABS supportSimon Pilgrim2019-01-121-0/+4
* [TargetLowering] Add ISD::ROTL/ROTR vector expansionSimon Pilgrim2018-12-131-40/+5
* [Intrinsic] Signed Fixed Point Multiplication IntrinsicLeonard Chan2018-12-121-0/+10
* [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)Simon Pilgrim2018-12-051-0/+7
* [FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsicsCameron McInally2018-11-051-0/+8
* [COFF, ARM64] Implement Intrinsic.sponentry for AArch64Mandeep Singh Grang2018-11-011-0/+1
* Revert "[COFF, ARM64] Implement Intrinsic.sponentry for AArch64"Mandeep Singh Grang2018-11-011-1/+0
* [COFF, ARM64] Implement Intrinsic.sponentry for AArch64Mandeep Singh Grang2018-10-311-0/+1
* Fix comment typo. NFCI.Simon Pilgrim2018-10-311-1/+1
* [SelectionDAG] SelectionDAGLegalize::ExpandBITREVERSE - ensure we use ShiftTySimon Pilgrim2018-10-311-6/+6
* [FPEnv] [FPEnv] Add constrained intrinsics for MAXNUM and MINNUMCameron McInally2018-10-301-0/+4
* [Intrinsic] Signed and Unsigned Saturation Subtraction IntirnsicsLeonard Chan2018-10-291-3/+7
* [TargetLowering] Move i64/vXi64 to f32/vXf32 UINT_TO_FP handling to TargetLow...Simon Pilgrim2018-10-281-27/+0
* [TargetLowering] Move LegalizeDAG FP_TO_UINT handling to TargetLowering::expa...Simon Pilgrim2018-10-271-22/+3
* [LegalizeDAG] Remove dead SINT_TO_FP legalization codeSimon Pilgrim2018-10-251-54/+19
* Missing semicolon.Simon Pilgrim2018-10-251-1/+1
* [TargetLowering] Improve vXi64 UINT_TO_FP vXf64 support (P38226)Simon Pilgrim2018-10-251-25/+6
* [LegalizeDAG] ExpandLegalINT_TO_FP - cleanup UINT_TO_FP i64 -> f32 expansion.Simon Pilgrim2018-10-241-11/+12
* [LegalizeDAG] Share Vector/Scalar CTPOP ExpansionSimon Pilgrim2018-10-231-58/+2
* [LegalizeDAG] Share Vector/Scalar CTLZ ExpansionSimon Pilgrim2018-10-231-32/+5
* [LegalizeDAG] Share Vector/Scalar CTTZ ExpansionSimon Pilgrim2018-10-231-31/+5
* [Intrinsic] Unigned Saturation Addition IntrinsicLeonard Chan2018-10-221-3/+5
* DAG: Change behavior of fminnum/fmaxnum nodesMatt Arsenault2018-10-221-1/+6
* [Intrinsic] Signed Saturation Addition IntrinsicLeonard Chan2018-10-161-0/+8
* [LegalizeDAG] ExpandLegalINT_TO_FP - cleanup UINT_TO_FP i64 -> f64 expansion.Simon Pilgrim2018-10-161-20/+17
* [LegalizeDAG] Don't bother with final MUL+SRL stage for byte CTPOP. Simon Pilgrim2018-10-141-3/+4
* Pull out repeated variables from SelectionDAGLegalize::ExpandBitCount.Simon Pilgrim2018-10-131-8/+2
* [X86][SSE] Remove most of vector CTTZ custom lowering and use LegalizeDAG ins...Simon Pilgrim2018-10-131-2/+2
* [X86][SSE] Begin removing vector CTTZ custom lowering and use LegalizeDAG ins...Simon Pilgrim2018-10-131-1/+1
* Pull out repeated value types. NFCI.Simon Pilgrim2018-10-121-6/+5
* [SelectionDAG] Move VectorLegalizer::ExpandCTLZ codegen into SelectionDAGLega...Simon Pilgrim2018-10-121-1/+1
* Revert r343948 "[LegalizeDAG] Make one of the ReplaceNode signatures take an ...Craig Topper2018-10-081-8/+6
* [LegalizeDAG] Make one of the ReplaceNode signatures take an ArrayRef instead...Craig Topper2018-10-081-6/+8
* [LegalizeDAG] Move legalization of scatter and masked store from LegalizeVect...Craig Topper2018-10-081-0/+8
* [DAG] SelectionDAGLegalize::ExpandLegalINT_TO_FP - use getFPExtendOrRound hel...Simon Pilgrim2018-09-261-11/+1
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