| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Don't crash when a glue node contains an internal CopyToReg | Hal Finkel | 2012-02-24 | 1 | -0/+3 |
| * | Handle all live physreg defs in the same place. | Jakob Stoklund Olesen | 2012-02-03 | 1 | -43/+46 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -2/+0 |
| * | Add a RegisterMaskSDNode class. | Jakob Stoklund Olesen | 2012-01-18 | 1 | -0/+2 |
| * | Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstr... | Pete Cooper | 2012-01-18 | 1 | -7/+12 |
| * | Add bundle aware API for querying instruction properties and switch the code | Evan Cheng | 2011-12-07 | 1 | -1/+1 |
| * | Simplify EXTRACT_SUBREG emission. | Jakob Stoklund Olesen | 2011-10-05 | 1 | -27/+46 |
| * | Simplify INSERT_SUBREG emission. | Jakob Stoklund Olesen | 2011-10-05 | 1 | -27/+19 |
| * | Move getCommonSubClass() into TRI. | Jakob Stoklund Olesen | 2011-09-30 | 1 | -1/+2 |
| * | Constrain register classes instead of emitting copies. | Jakob Stoklund Olesen | 2011-09-22 | 1 | -3/+5 |
| * | Lower ARM adds/subs to add/sub after adding optional CPSR operand. | Andrew Trick | 2011-09-21 | 1 | -0/+2 |
| * | Restore hasPostISelHook tblgen flag. | Andrew Trick | 2011-09-20 | 1 | -1/+2 |
| * | ARM isel bug fix for adds/subs operands. | Andrew Trick | 2011-09-20 | 1 | -2/+1 |
| * | whitespace | Andrew Trick | 2011-09-20 | 1 | -26/+26 |
| * | Follow up to r138791. | Evan Cheng | 2011-08-30 | 1 | -0/+4 |
| * | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner | 2011-07-18 | 1 | -1/+1 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -16/+16 |
| * | More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. | Evan Cheng | 2011-06-27 | 1 | -3/+3 |
| * | Distinguish early clobber output operands from clobbered registers. | Jakob Stoklund Olesen | 2011-06-27 | 1 | -0/+1 |
| * | Handle debug info for i128 constants. | Devang Patel | 2011-06-24 | 1 | -6/+2 |
| * | Don't use register classes larger than TLI->getRegClassFor(VT). | Jakob Stoklund Olesen | 2011-06-16 | 1 | -2/+7 |
| * | Change the REG_SEQUENCE SDNode to take an explict register class ID as its fi... | Owen Anderson | 2011-06-16 | 1 | -5/+6 |
| * | Use TRI::has{Sub,Super}ClassEq() where possible. | Jakob Stoklund Olesen | 2011-06-02 | 1 | -1/+1 |
| * | Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. | Jakob Stoklund Olesen | 2011-01-10 | 1 | -1/+1 |
| * | Do not model all INLINEASM instructions as having unmodelled side effects. | Evan Cheng | 2011-01-07 | 1 | -4/+4 |
| * | Optimize: | Evan Cheng | 2011-01-05 | 1 | -23/+39 |
| * | flags -> glue for selectiondag | Chris Lattner | 2010-12-23 | 1 | -10/+10 |
| * | Change all self assignments X=X to (void)X, so that we can turn on a | Jeffrey Yasskin | 2010-12-23 | 1 | -6/+6 |
| * | rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for | Chris Lattner | 2010-12-21 | 1 | -9/+9 |
| * | Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation. | Bob Wilson | 2010-12-17 | 1 | -3/+1 |
| * | Reword comment slightly. | Eric Christopher | 2010-12-08 | 1 | -1/+1 |
| * | Split pseudo-instruction expansion into a separate pass, to make it | Dan Gohman | 2010-11-16 | 1 | -13/+0 |
| * | Revert r112461. It was failing on PPC... | Bill Wendling | 2010-08-30 | 1 | -4/+2 |
| * | When adding a register, we should mark it as "def" if it can optionally define | Bill Wendling | 2010-08-30 | 1 | -2/+4 |
| * | Emit COPY instructions instead of using copyRegToReg in InstrEmitter, | Jakob Stoklund Olesen | 2010-07-10 | 1 | -34/+9 |
| * | Insert IMPLICIT_DEF instructions at the current insert position, not | Dan Gohman | 2010-07-10 | 1 | -1/+1 |
| * | Reapply bottom-up fast-isel, with several fixes for x86-32: | Dan Gohman | 2010-07-10 | 1 | -2/+7 |
| * | --- Reverse-merging r107947 into '.': | Bob Wilson | 2010-07-09 | 1 | -7/+2 |
| * | Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting | Dan Gohman | 2010-07-09 | 1 | -2/+7 |
| * | Convert EXTRACT_SUBREG to COPY when emitting machine instrs. | Jakob Stoklund Olesen | 2010-07-08 | 1 | -7/+9 |
| * | Revert 107840 107839 107813 107804 107800 107797 107791. | Dan Gohman | 2010-07-08 | 1 | -5/+2 |
| * | Not all custom inserters create new basic blocks. If the inserter | Dan Gohman | 2010-07-07 | 1 | -2/+5 |
| * | Update comment. | Devang Patel | 2010-07-07 | 1 | -3/+4 |
| * | Reapply r107655 with fixes; insert the pseudo instruction into | Dan Gohman | 2010-07-06 | 1 | -2/+5 |
| * | Propagate the AlignStack bit in InlineAsm's to the | Dale Johannesen | 2010-07-02 | 1 | -0/+6 |
| * | Add a VT argument to getMinimalPhysRegClass and replace the copy related uses | Rafael Espindola | 2010-06-29 | 1 | -4/+4 |
| * | Teach regular and fast isel to set dead flags on unused implicit defs | Dan Gohman | 2010-06-18 | 1 | -0/+27 |
| * | Mark physregs defined by inline asm as implicit. | Jakob Stoklund Olesen | 2010-06-09 | 1 | -2/+6 |
| * | Add argument name comments. | Jakob Stoklund Olesen | 2010-06-09 | 1 | -2/+6 |
| * | Continuously refine the register class of REG_SEQUENCE def with all the sourc... | Evan Cheng | 2010-05-18 | 1 | -2/+3 |
