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path: root/llvm/lib/CodeGen/MachineOperand.cpp
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* [GlobalISel] Change representation of shuffle masks in MachineOperand.Eli Friedman2020-01-131-6/+6
* [MIR] Fix cyclic dependency of MIR formatterPeng Guo2020-01-101-8/+8
* Revert "Revert "[MIR] Target specific MIR formating and parsing""Daniel Sanders2020-01-081-32/+25
* Revert "[MIR] Target specific MIR formating and parsing"Nico Weber2020-01-081-25/+32
* [MIR] Target specific MIR formating and parsingPeng Guo2020-01-081-32/+25
* Revert "[MIR] Target specific MIR formating and parsing"Daniel Sanders2020-01-081-25/+32
* [MIR] Target specific MIR formating and parsingPeng Guo2020-01-081-32/+25
* [Alignment][NFC] Finish transition for `Loads`Guillaume Chatelet2019-10-211-1/+2
* [CodeGen] Remove unused MachineMemOperand::print wrappers (PR41772)Simon Pilgrim2019-10-021-11/+0
* MCRegisterInfo: Merge getLLVMRegNum and getLLVMRegNumFromEHPavel Labath2019-09-241-5/+3
* Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVMDaniel Sanders2019-08-151-1/+1
* GlobalISel: Change representation of shuffle masksMatt Arsenault2019-08-131-0/+18
* CodeGen: Migration to using RegisterMatt Arsenault2019-08-061-6/+6
* Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re...Daniel Sanders2019-08-011-7/+7
* SelectionDAG, MI, AArch64: Widen target flags fields/arguments from unsigned ...Peter Collingbourne2019-07-311-3/+3
* CodeGen: Introduce a class for registersMatt Arsenault2019-06-241-1/+1
* Fix not calling TargetCustom PSVs printerMatt Arsenault2019-06-141-1/+1
* [CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands.Eli Friedman2019-06-011-1/+1
* [MachineOperand] Add a ChangeToGA methodNicolai Haehnle2019-05-151-0/+13
* Include what's used in a few cpp files - these were getting transitiveEric Christopher2019-04-121-0/+1
* GlobalISel: Fix creating MMOs with align 0Matt Arsenault2019-01-311-1/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-12-181-0/+5
* Revert r347490 as it breaks address sanitizer buildsLuke Cheeseman2018-11-231-5/+0
* Revert r343341Luke Cheeseman2018-11-231-0/+5
* MachineOperand/MIParser: Do not print debug-use flag, infer itMatthias Braun2018-10-301-2/+2
* Fix in MachineOperand::printIRValueReference().Jonas Paulsson2018-10-251-1/+2
* Revert r343317Luke Cheeseman2018-09-281-5/+0
* Reapply changes reverted by r343235Luke Cheeseman2018-09-281-0/+5
* Revert r343192 as an ubsan build is currently failingLuke Cheeseman2018-09-271-5/+0
* Reapply changes reverted in r343114, lldb patch to follow shortlyLuke Cheeseman2018-09-271-0/+5
* Revert r343112 as CallFrameString API change has broken lldb buildsLuke Cheeseman2018-09-261-5/+0
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-09-261-0/+5
* Revert r343089 "[AArch64] - Return address signing dwarf support"Hans Wennborg2018-09-261-5/+0
* [AArch64] - Return address signing dwarf supportLuke Cheeseman2018-09-261-0/+5
* Consistently use MemoryLocation::UnknownSize to indicate unknown access sizeKrzysztof Parzyszek2018-08-201-1/+6
* [ADT] Make escaping fn conform to coding guidelinesJonas Devlieghere2018-05-311-1/+1
* [MachineVerifier][GlobalISel] NFC, Improving MO printing and refactoring visi...Roman Tereshin2018-05-071-1/+7
* IWYU for llvm-config.h in llvm, additions.Nico Weber2018-04-301-0/+1
* Fix type mismatch between MachineMemOperand constructor and accessors. NFCDaniel Sanders2018-04-091-1/+1
* [MIR] Adding support for Named Virtual Registers in MIR.Puyan Lotfi2018-03-301-1/+9
* [CodeGen] Fixed unreachable with -print-machineinstrs and custom pseudo sourc...Tim Renouf2018-03-271-1/+6
* [CodeGen] Use MIR syntax for MachineMemOperand printingFrancis Visoiu Mistrih2018-03-141-103/+168
* [MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry2018-02-231-15/+15
* [CodeGen][NFC] Rename IsVerbose to IsStandalone in Machine*::printFrancis Visoiu Mistrih2018-01-181-3/+3
* [CodeGen] Print RegClasses on MI in verbose modeFrancis Visoiu Mistrih2018-01-181-3/+3
* [CodeGen][NFC] Correct case for printSubRegIdxFrancis Visoiu Mistrih2018-01-161-1/+1
* [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'.Puyan Lotfi2018-01-101-1/+1
* [CodeGen] Move printing MO_BlockAddress operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-191-6/+39
* [CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::printFrancis Visoiu Mistrih2017-12-191-2/+2
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