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author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-19 21:47:14 +0000 |
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committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-19 21:47:14 +0000 |
commit | f81727d138b3b216c4db06ab8b01d67de6580525 (patch) | |
tree | 977661c9d0087e7e6f30ecd569d85304454d1041 /llvm/lib/CodeGen/MachineOperand.cpp | |
parent | cb2683d46a5287b29b2494348f1921f7caed5c68 (diff) | |
download | bcm5719-llvm-f81727d138b3b216c4db06ab8b01d67de6580525.tar.gz bcm5719-llvm-f81727d138b3b216c4db06ab8b01d67de6580525.zip |
[CodeGen] Move printing MO_BlockAddress operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the
interfaces.
llvm-svn: 321113
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineOperand.cpp | 45 |
1 files changed, 39 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index fee99c91bbe..ec81c639117 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -417,6 +417,29 @@ static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS, OS << printReg(Reg, TRI); } +static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB, + ModuleSlotTracker &MST) { + OS << "%ir-block."; + if (BB.hasName()) { + printLLVMNameWithoutPrefix(OS, BB.getName()); + return; + } + Optional<int> Slot; + if (const Function *F = BB.getParent()) { + if (F == MST.getCurrentFunction()) { + Slot = MST.getLocalSlot(&BB); + } else if (const Module *M = F->getParent()) { + ModuleSlotTracker CustomMST(M, /*ShouldInitializeAllMetadata=*/false); + CustomMST.incorporateFunction(*F); + Slot = CustomMST.getLocalSlot(&BB); + } + } + if (Slot) + MachineOperand::printIRSlotNumber(OS, *Slot); + else + OS << "<unknown>"; +} + void MachineOperand::printSubregIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI) { OS << "%subreg."; @@ -505,6 +528,13 @@ void MachineOperand::printOperandOffset(raw_ostream &OS, int64_t Offset) { OS << " + " << Offset; } +void MachineOperand::printIRSlotNumber(raw_ostream &OS, int Slot) { + if (Slot == -1) + OS << "<badref>"; + else + OS << Slot; +} + static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI, const TargetRegisterInfo *TRI) { switch (CFI.getOperation()) { @@ -731,13 +761,16 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, printOperandOffset(OS, getOffset()); break; } - case MachineOperand::MO_BlockAddress: - OS << '<'; - getBlockAddress()->printAsOperand(OS, /*PrintType=*/false, MST); - if (getOffset()) - OS << "+" << getOffset(); - OS << '>'; + case MachineOperand::MO_BlockAddress: { + OS << "blockaddress("; + getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false, + MST); + OS << ", "; + printIRBlockReference(OS, *getBlockAddress()->getBasicBlock(), MST); + OS << ')'; + MachineOperand::printOperandOffset(OS, getOffset()); break; + } case MachineOperand::MO_RegisterMask: { OS << "<regmask"; if (TRI) { |