summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineCSE.cpp
Commit message (Expand)AuthorAgeFilesLines
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again)Roman Tereshin2018-10-201-1/+16
* [DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy instruction removal.Carlos Alberto Enciso2018-10-011-6/+2
* [DWARF] Missing location debug information with -O2.Carlos Alberto Enciso2018-08-301-0/+8
* [MIR][MachineCSE] Implementing proper MachineInstr::getNumExplicitDefs()Roman Tereshin2018-06-121-2/+1
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-8/+9
* [DebugInfo] Examine all uses of isDebugValue() for debug instructions.Shiva Chen2018-05-091-2/+2
* [MachineCSE] Rewrite a loop checking if a block is in a set of blocks without...Michael Zolotukhin2018-05-041-7/+5
* GlobalISel: Make MachineCSE runnable in the middle of the GlobalISelJustin Bogner2018-01-181-7/+6
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-4/+4
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-5/+5
* [MachineCSE] Add new callback for is caller preserved or constant physregsTony Jiang2017-11-201-2/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-3/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko2017-08-241-11/+36
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* CodeGen: Rename DEBUG_TYPE to match passnamesMatthias Braun2017-05-251-4/+4
* MachineCSE: Respect interblock physreg livenessMikael Holmen2017-05-241-2/+2
* [codegen] Add generic functions to skip debug values.Florian Hahn2016-12-161-2/+1
* MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFCMatthias Braun2016-10-281-1/+1
* [CodeGen] Rename MachineInstr::isInvariantLoad to isDereferenceableInvariantL...Justin Lebar2016-09-101-1/+1
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-4/+3
* Re-commit optimization bisect support (r267022) without new pass manager supp...Andrew Kaylor2016-04-221-1/+1
* Revert "Initial implementation of optimization bisect support."Vedant Kumar2016-04-221-1/+1
* Initial implementation of optimization bisect support.Andrew Kaylor2016-04-211-1/+1
* [SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARDTim Shen2016-04-191-0/+6
* rangify; NFCISanjay Patel2016-01-061-24/+14
* [PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatibleChandler Carruth2015-09-091-3/+3
* MachineCSE: Add a target query for the LookAheadLimit heurisiticTom Stellard2015-05-091-2/+3
* Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.Benjamin Kramer2015-03-231-0/+1
* MachineCSE: Clear dead-def flag on CSE.Matthias Braun2015-02-041-2/+9
* [MachineCSE] Clear kill-flag on registers imp-def'd by the CSE'd instruction.Ahmed Bougacha2014-12-021-0/+31
* In Machine CSE pass, the source register of a COPY machine instruction canJiangning Liu2014-08-111-11/+19
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-2/+2
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-2/+3
* Add TargetInstrInfo interface isAsCheapAsAMove.Jiangning Liu2014-07-291-1/+1
* [Modules] Remove potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* Disable each MachineFunctionPass for 'optnone' functions, unless thatPaul Robinson2014-03-311-0/+3
* Switch a number of loops in lib/CodeGen over to range-based for-loops, now thatOwen Anderson2014-03-171-17/+9
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-131-17/+17
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-071-3/+3
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-071-2/+2
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-2/+2
* Disabled subregister copy coalescing during MachineCSE.Andrew Trick2013-12-171-5/+15
* Allow MachineCSE to coalesce trivial subregister copies the same way that it ...Andrew Trick2013-12-171-3/+8
* Revert "Allow MachineCSE to coalesce trivial subregister copies the same way ...Rafael Espindola2013-12-161-8/+3
* Allow MachineCSE to coalesce trivial subregister copies the same wayAndrew Trick2013-12-161-3/+8
* whitespaceAndrew Trick2013-12-161-1/+1
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s...Craig Topper2013-07-141-4/+4
OpenPOWER on IntegriCloud