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authorTom Stellard <thomas.stellard@amd.com>2015-05-09 00:56:07 +0000
committerTom Stellard <thomas.stellard@amd.com>2015-05-09 00:56:07 +0000
commitf01af29f01f17c15b95136f5608748b098d1faa3 (patch)
tree557bb5b08bbd679fbd64bccbc56f33cecc862d59 /llvm/lib/CodeGen/MachineCSE.cpp
parentd54fb8990171cf37f78ee64b5a94a1faae71b72a (diff)
downloadbcm5719-llvm-f01af29f01f17c15b95136f5608748b098d1faa3.tar.gz
bcm5719-llvm-f01af29f01f17c15b95136f5608748b098d1faa3.zip
MachineCSE: Add a target query for the LookAheadLimit heurisitic
This is used to determine whether or not to CSE physical register defs. Differential Revision: http://reviews.llvm.org/D9472 llvm-svn: 236923
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineCSE.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index f72d72a2e87..87aaaa0834c 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -48,7 +48,7 @@ namespace {
MachineRegisterInfo *MRI;
public:
static char ID; // Pass identification
- MachineCSE() : MachineFunctionPass(ID), LookAheadLimit(5), CurrVN(0) {
+ MachineCSE() : MachineFunctionPass(ID), LookAheadLimit(0), CurrVN(0) {
initializeMachineCSEPass(*PassRegistry::getPassRegistry());
}
@@ -69,7 +69,7 @@ namespace {
}
private:
- const unsigned LookAheadLimit;
+ unsigned LookAheadLimit;
typedef RecyclingAllocator<BumpPtrAllocator,
ScopedHashTableVal<MachineInstr*, unsigned> > AllocatorTy;
typedef ScopedHashTable<MachineInstr*, unsigned,
@@ -716,5 +716,6 @@ bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
AA = &getAnalysis<AliasAnalysis>();
DT = &getAnalysis<MachineDominatorTree>();
+ LookAheadLimit = TII->getMachineCSELookAheadLimit();
return PerformCSE(DT->getRootNode());
}
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