summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineCSE.cpp
Commit message (Expand)AuthorAgeFilesLines
* MachineRegisterInfo: Remove unused arg from isConstantPhysReg(); NFCMatthias Braun2016-10-281-1/+1
* [CodeGen] Rename MachineInstr::isInvariantLoad to isDereferenceableInvariantL...Justin Lebar2016-09-101-1/+1
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-4/+3
* Re-commit optimization bisect support (r267022) without new pass manager supp...Andrew Kaylor2016-04-221-1/+1
* Revert "Initial implementation of optimization bisect support."Vedant Kumar2016-04-221-1/+1
* Initial implementation of optimization bisect support.Andrew Kaylor2016-04-211-1/+1
* [SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARDTim Shen2016-04-191-0/+6
* rangify; NFCISanjay Patel2016-01-061-24/+14
* [PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatibleChandler Carruth2015-09-091-3/+3
* MachineCSE: Add a target query for the LookAheadLimit heurisiticTom Stellard2015-05-091-2/+3
* Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.Benjamin Kramer2015-03-231-0/+1
* MachineCSE: Clear dead-def flag on CSE.Matthias Braun2015-02-041-2/+9
* [MachineCSE] Clear kill-flag on registers imp-def'd by the CSE'd instruction.Ahmed Bougacha2014-12-021-0/+31
* In Machine CSE pass, the source register of a COPY machine instruction canJiangning Liu2014-08-111-11/+19
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-2/+2
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-2/+3
* Add TargetInstrInfo interface isAsCheapAsAMove.Jiangning Liu2014-07-291-1/+1
* [Modules] Remove potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* Disable each MachineFunctionPass for 'optnone' functions, unless thatPaul Robinson2014-03-311-0/+3
* Switch a number of loops in lib/CodeGen over to range-based for-loops, now thatOwen Anderson2014-03-171-17/+9
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-131-17/+17
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-071-3/+3
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-071-2/+2
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-2/+2
* Disabled subregister copy coalescing during MachineCSE.Andrew Trick2013-12-171-5/+15
* Allow MachineCSE to coalesce trivial subregister copies the same way that it ...Andrew Trick2013-12-171-3/+8
* Revert "Allow MachineCSE to coalesce trivial subregister copies the same way ...Rafael Espindola2013-12-161-8/+3
* Allow MachineCSE to coalesce trivial subregister copies the same wayAndrew Trick2013-12-161-3/+8
* whitespaceAndrew Trick2013-12-161-1/+1
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s...Craig Topper2013-07-141-4/+4
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-5/+5
* CSE: allow PerformTrivialCoalescing to check copies across basic blockManman Ren2012-11-271-2/+0
* Don't use iterator after being erased.Jakub Staszak2012-11-261-1/+1
* Do not consider a machine instruction that uses and defines the sameUlrich Weigand2012-11-131-16/+44
* Remove unused BitVectors from getAllocatableSet().Jakob Stoklund Olesen2012-10-161-3/+0
* Switch most getReservedRegs() clients to the MRI equivalent.Jakob Stoklund Olesen2012-10-151-4/+1
* MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps a...Benjamin Kramer2012-08-111-4/+3
* PR13578: Teach MachineCSE that instructions that use a constant register can ...Benjamin Kramer2012-08-111-2/+5
* X86: enable CSE between CMP and SUBManman Ren2012-08-081-2/+18
* MachineCSE: Update the heuristics for isProfitableToCSE.Manman Ren2012-08-071-0/+23
* Remove tabs.Bill Wendling2012-07-191-1/+1
* Remove ParentMap. You can just ask the domnode for its parent. No functionalityNick Lewycky2012-07-051-11/+8
* Switch some getAliasSet clients to MCRegAliasIterator.Jakob Stoklund Olesen2012-06-011-3/+2
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-1/+1
* Handle regmasks in MachineCSE.Jakob Stoklund Olesen2012-02-281-0/+6
* Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE ba...Lang Hames2012-02-171-3/+9
* Oop - r150653 + r150654 broke one of my test cases. Backing out for now...Lang Hames2012-02-161-9/+3
* MachineCSE shouldn't extend the live ranges of reserved or allocatable regist...Lang Hames2012-02-161-3/+9
* Codegen pass definition cleanup. No functionality.Andrew Trick2012-02-081-2/+1
* whitespaceAndrew Trick2012-02-081-2/+2
OpenPOWER on IntegriCloud