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* Sink DI metadata usage out of MachineInstr.h and MachineInstrBuilder.hReid Kleckner2016-04-141-0/+1
| | | | | | | | | | | MachineInstr.h and MachineInstrBuilder.h are very popular headers, widely included across all LLVM backends. It turns out that there only a handful of TUs that actually care about DI operands on MachineInstrs. After this change, touching DebugInfoMetadata.h and rebuilding llc only needs 112 actions instead of 542. llvm-svn: 266351
* [MIR] Teach the parser how to deal with register banks.Quentin Colombet2016-04-081-10/+51
| | | | llvm-svn: 265802
* Introduce MachineFunctionProperties and the AllVRegsAllocated propertyDerek Schuff2016-03-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | MachineFunctionProperties represents a set of properties that a MachineFunction can have at particular points in time. Existing examples of this idea are MachineRegisterInfo::isSSA() and MachineRegisterInfo::tracksLiveness() which will eventually be switched to use this mechanism. This change introduces the AllVRegsAllocated property; i.e. the property that all virtual registers have been allocated and there are no VReg operands left. With this mechanism, passes can declare that they require a particular property to be set, or that they set or clear properties by implementing e.g. MachineFunctionPass::getRequiredProperties(). The MachineFunctionPass base class verifies that the requirements are met, and handles the setting and clearing based on the delcarations. Passes can also directly query and update the current properties of the MF if they want to have conditional behavior. This change annotates the target-independent post-regalloc passes; future changes will also annotate target-specific ones. Reviewers: qcolombet, hfinkel Differential Revision: http://reviews.llvm.org/D18421 llvm-svn: 264593
* [MIR] Teach the parser/printer that generic virtual registers do not need a ↵Quentin Colombet2016-03-081-6/+13
| | | | | | register class. llvm-svn: 262893
* MIR Serialization: Serialize MMI's variable debug information.Alex Lorenz2015-08-191-0/+61
| | | | llvm-svn: 245396
* MIR Serialization: Serialize the frame information's stack protector index.Alex Lorenz2015-08-181-0/+11
| | | | llvm-svn: 245372
* MIR Serialization: Serialize the local offsets for the stack objects.Alex Lorenz2015-08-171-0/+2
| | | | llvm-svn: 245249
* MIR Serialization: Change MIR syntax - use custom syntax for MBBs.Alex Lorenz2015-08-131-89/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit modifies the way the machine basic blocks are serialized - now the machine basic blocks are serialized using a custom syntax instead of relying on YAML primitives. Instead of using YAML mappings to represent the individual machine basic blocks in a machine function's body, the new syntax uses a single YAML block scalar which contains all of the machine basic blocks and instructions for that function. This is an example of a function's body that uses the old syntax: body: - id: 0 name: entry instructions: - '%eax = MOV32r0 implicit-def %eflags' - 'RETQ %eax' ... The same body is now written like this: body: | bb.0.entry: %eax = MOV32r0 implicit-def %eflags RETQ %eax ... This syntax change is motivated by the fact that the bundled machine instructions didn't map that well to the old syntax which was using a single YAML sequence to store all of the machine instructions in a block. The bundled machine instructions internally use flags like BundledPred and BundledSucc to determine the bundles, and serializing them as MI flags using the old syntax would have had a negative impact on the readability and the ease of editing for MIR files. The new syntax allows me to serialize the bundled machine instructions using a block construct without relying on the internal flags, for example: BUNDLE implicit-def dead %itstate, implicit-def %s1 ... { t2IT 1, 24, implicit-def %itstate %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate } This commit also converts the MIR testcases to the new syntax. I developed a script that can convert from the old syntax to the new one. I will post the script on the llvm-commits mailing list in the thread for this commit. llvm-svn: 244982
* MIR Parser: Rename the method 'diagFromLLVMAssemblyDiag'. NFC.Alex Lorenz2015-08-131-6/+7
| | | | | | | | | This commit renames the method 'diagFromLLVMAssemblyDiag' to 'diagFromBlockStringDiag'. This method will be used when converting diagnostics from other YAML block strings, and not just the LLVM module block string, so the new name should reflect that. llvm-svn: 244943
* MIR Serialization: Serialize UsedPhysRegMask from the machine register info.Alex Lorenz2015-08-111-0/+32
| | | | | | | | | | | | This commit serializes the UsedPhysRegMask register mask from the machine register information class. The mask is serialized as an inverted 'calleeSavedRegisters' mask to keep the output minimal. This commit also allows the MIR parser to infer this mask from the register mask operands if the machine function doesn't specify it. Reviewers: Duncan P. N. Exon Smith llvm-svn: 244548
* MIR Parser: Report an error when a stack object is redefined.Alex Lorenz2015-08-101-2/+5
| | | | llvm-svn: 244536
* MIR Parser: Report an error when a fixed stack object is redefined.Alex Lorenz2015-08-101-2/+6
| | | | llvm-svn: 244534
* MIR Parser: Report an error when a jump table entry is redefined.Alex Lorenz2015-07-311-2/+5
| | | | llvm-svn: 243798
* MIR Parser: Remove unused variable.Alex Lorenz2015-07-311-1/+0
| | | | | | This variable is unused as of r243572. llvm-svn: 243796
* MIR Parser: Report an error when a constant pool item is redefined.Alex Lorenz2015-07-301-3/+6
| | | | llvm-svn: 243696
* MIR Parser: Report an error when a virtual register is redefined.Alex Lorenz2015-07-301-3/+5
| | | | llvm-svn: 243695
* MIR Serialization: Serialize the machine basic block's successor weights.Alex Lorenz2015-07-301-1/+13
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 243659
* MIR Serialization: Serialize the frame info's save and restore points.Alex Lorenz2015-07-291-2/+16
| | | | | | | This commit serializes the save and restore machine basic block references from the machine frame information class. llvm-svn: 243575
* MIR Parser: Extract the code that parses MBB references into a new method. NFC.Alex Lorenz2015-07-291-5/+18
| | | | | | | This commit extracts the code that's used by the class 'MIRParserImpl' to parse the machine basic block references into a new method named 'parseMBBReference'. llvm-svn: 243572
* MIR Parser: Remove redundant parameters. NFC.Alex Lorenz2015-07-281-6/+6
| | | | | | | | | This commit removes the redundant parameters from the two methods 'initializeRegisterInfo' and 'initializeFrameInfo'. The removed parameters are redundant as we are already passing in the 'MachineFunction' to those methods, and those parameters can be derived from the machine function parameter. llvm-svn: 243445
* MIR Serialization: Serialize the unnamed basic block references.Alex Lorenz2015-07-271-0/+7
| | | | | | | | | | | | This commit serializes the references from the machine basic blocks to the unnamed basic blocks. This commit adds a new attribute to the machine basic block's YAML mapping called 'ir-block'. This attribute contains the actual reference to the basic block. Reviewers: Duncan P. N. Exon Smith llvm-svn: 243340
* MIR Serialization: Serialize the machine function's liveins.Alex Lorenz2015-07-271-0/+15
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 243288
* MIR Serialization: Serialize MachineFrameInfo's callee saved information.Alex Lorenz2015-07-241-12/+41
| | | | | | | | | This commit serializes the callee saved information from the class 'MachineFrameInfo'. This commit extends the YAML mappings for the fixed and the ordinary stack objects and adds an optional 'callee-saved-register' attribute. This attribute is used to serialize the callee save information. llvm-svn: 243173
* MIR Serialization: Serialize the simple virtual register allocation hints.Alex Lorenz2015-07-241-12/+18
| | | | | | | This commit serializes the virtual register allocations hints of type 0. These hints specify the preferred physical registers for allocations. llvm-svn: 243156
* MIR Parser: Run the machine verifier after initializing machine functions.Alex Lorenz2015-07-241-0/+4
| | | | llvm-svn: 243128
* MIR Serialization: Initial serialization of machine constant pools.Alex Lorenz2015-07-201-0/+35
| | | | | | | | | | This commit implements the initial serialization of machine constant pools and the constant pool index machine operands. The constant pool is serialized using a YAML sequence of YAML mappings that represent the constant values. The target-specific constant pool items aren't serialized by this commit. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242707
* MIR Serialization: Serialize the frame index machine operands.Alex Lorenz2015-07-161-9/+14
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242487
* MIR Serialization: Serialize the jump table index operands.Alex Lorenz2015-07-151-3/+5
| | | | | Reviewers: Duncan P. N. Exon Smith llvm-svn: 242358
* MIR Serialization: Serialize the jump table info.Alex Lorenz2015-07-151-0/+27
| | | | | | | | | | | | | | The jump table info is serialized using a YAML mapping that contains its kind and a YAML sequence of jump table entries. A jump table entry is a YAML mapping that has an ID and an inline YAML sequence of machine basic block references. The testcase 'CodeGen/MIR/X86/jump-table-info.mir' doesn't have any instructions because one of them contains a jump table index operand. The jump table index operands will be serialized in a follow up patch, and the appropriate instructions will be added to this testcase. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242357
* MIR Serialization: Serialize references from the stack objects to named allocas.Alex Lorenz2015-07-151-6/+17
| | | | | | | | | This commit serializes the references to the named LLVM alloca instructions from the stack objects in the machine frame info. This commit adds a field 'Name' to the struct 'yaml::MachineStackObject'. This new field is used to store the name of the alloca instruction when the alloca is present and when it has a name. llvm-svn: 242339
* MIR Serialization: Serialize the machine basic block live in registers.Alex Lorenz2015-07-141-0/+8
| | | | llvm-svn: 242204
* MIR Serialization: Serialize the variable sized stack objects.Alex Lorenz2015-07-141-3/+8
| | | | llvm-svn: 242095
* MIR Serialization: Serialize the fixed stack objects.Alex Lorenz2015-07-131-1/+14
| | | | | | | | | | | | | This commit serializes the fixed stack objects, including fixed spill slots. The fixed stack objects are serialized using a YAML sequence of YAML inline mappings. Each mapping has the object's ID, type, size, offset, and alignment. The objects that aren't spill slots also serialize the isImmutable and isAliased flags. The fixed stack objects are a part of the machine function's YAML mapping. Reviewers: Duncan P. N. Exon Smith llvm-svn: 242045
* MIR Serialization: Serialize the virtual register operands.Alex Lorenz2015-07-101-9/+14
| | | | | | | | Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D11005 llvm-svn: 241959
* MIR Serialization: Initial serialization of stack objects.Alex Lorenz2015-07-101-3/+14
| | | | | | | | | | | | | | This commit implements the initial serialization of stack objects from the MachineFrameInfo class. It can only serialize the ordinary stack objects (including ordinary spill slots), but it doesn't serialize variable sized or fixed stack objects yet. The stack objects are serialized using a YAML sequence of YAML inline mappings. Each mapping has the object's ID, type, size, offset and alignment. The stack objects are a part of machine function's YAML mapping. Reviewers: Duncan P. N. Exon Smith llvm-svn: 241922
* MIR Serialization: Serialize the virtual register definitions.Alex Lorenz2015-07-091-3/+47
| | | | | | | | | | | | The virtual registers are serialized using a YAML sequence of YAML inline mappings. Each mapping has the id of the virtual register and the register class. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10981 llvm-svn: 241868
* MIR Parser: Report an error when parsing machine function with an empty body.Alex Lorenz2015-07-091-0/+3
| | | | | | | | | | This commit adds a new error which is reported when the MIR Parser encounters a machine function without any machine basic blocks. The machine verifier expects that the machine functions have at least one MBB, and this error will prevent machine functions without MBBs from reaching the machine verifier and crashing with an assertion. llvm-svn: 241862
* MIR Serialization: Serialize the simple MachineFrameInfo attributes.Alex Lorenz2015-07-091-0/+25
| | | | | | | | | | | | This commit serializes the 13 scalar boolean and integer attributes from the MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap, HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack, HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and HasMustTailInVarArgFunc. These attributes are serialized as part of the frameInfo YAML mapping, which itself is a part of the machine function's YAML mapping. llvm-svn: 241844
* MIR Parser: Use source locations for MBB naming errors.Alex Lorenz2015-07-081-4/+18
| | | | | | | | | This commit changes the type of the field 'Name' in the struct 'yaml::MachineBasicBlock' from 'std::string' to 'yaml::StringValue'. This change allows the MIR parser to report errors related to the MBB name with the proper source locations. llvm-svn: 241718
* MIR Parser: wrap 'MBBSlots' from the MI parsing functions in a struct. NFC.Alex Lorenz2015-07-071-10/+10
| | | | | | | | | | | This commit modifies the interface for the machine instruction parsing functions by wrapping the parameter 'MBBSlots' in a new structure called 'PerFunctionMIParsingState'. This change is useful as in the future I will be able to pass new parameters to the machine instruction parser just by modifying the 'PerFunctionMIParsingState' structure instead of adding a new parameter to each function. llvm-svn: 241607
* MIR Serialization: Serialize MBB successors.Alex Lorenz2015-06-301-1/+10
| | | | | | | | | | | | | This commit implements serialization of the machine basic block successors. It uses a YAML flow sequence that contains strings that have the MBB references. The MBB references in those strings use the same syntax as the MBB machine operands in the machine instruction strings. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10699 llvm-svn: 241093
* MIR Parser: refactor error reporting for machine instruction parser errors. NFC.Alex Lorenz2015-06-301-5/+14
| | | | | | | This commit extracts the code that reports an error that's produced by the machine instruction parser into a new method that can be reused in other places. llvm-svn: 241086
* MIR Parser: make the machine instruction parsing interface more consistent. NFC.Alex Lorenz2015-06-301-6/+6
| | | | | | | | | This commit refactors the interface for machine instruction parser. It adopts the pattern of returning a bool and passing in the result in the first argument that is used by the other parsing methods for the the method 'parse' and the function 'parseMachineInstr'. llvm-svn: 241085
* MIR Serialization: Serialize global address machine operands.Alex Lorenz2015-06-261-2/+5
| | | | | | | | | | | | This commit serializes the global address machine operands. This commit doesn't serialize the operand's offset and target flags, it serializes only the global value reference. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10671 llvm-svn: 240851
* MIR Serialization: Serialize machine basic block operands.Alex Lorenz2015-06-261-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | | This commit serializes machine basic block operands. The machine basic block operands use the following syntax: %bb.<id>[.<name>] This commit also modifies the YAML representation for the machine basic blocks - a new, required field 'id' is added to the MBB YAML mapping. The id is used to resolve the MBB references to the actual MBBs. And while the name of the MBB can be included in a MBB reference, this name isn't used to resolve MBB references - as it's possible that multiple MBBs will reference the same BB and thus they will have the same name. If the name is specified, the parser will verify that it is equal to the name of the MBB with the specified id. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10608 llvm-svn: 240792
* MIR Serialization: Serialize simple MachineRegisterInfo attributes.Alex Lorenz2015-06-241-0/+19
| | | | | | | | | | | | | This commit serializes the 3 scalar boolean attributes from the MachineRegisterInfo class: IsSSA, TracksRegLiveness, and TracksSubRegLiveness. These attributes are serialized as part of the machine function YAML mapping. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10618 llvm-svn: 240579
* MIR Parser: Use correct source locations for machine instruction diagnostics.Alex Lorenz2015-06-231-2/+23
| | | | | | | | | | | | This commit translates the source locations for MIParser diagnostics from the locations in the machine instruction string to the locations in the MIR file. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10574 llvm-svn: 240474
* MIR Serialization: Serialize machine instruction names.Alex Lorenz2015-06-221-3/+15
| | | | | | | | | | | | | | | | This commit implements initial machine instruction serialization. It serializes machine instruction names. The instructions are represented using a YAML sequence of string literals and are a part of machine basic block YAML mapping. This commit introduces a class called 'MIParser' which will be used to parse the machine instructions and operands. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10481 llvm-svn: 240295
* MIR Parser: report an error when a basic block isn't found.Alex Lorenz2015-06-191-1/+3
| | | | | | | This commit reports an error when the MIR parser can't find a basic block with the machine basic block's name. llvm-svn: 240174
* MIR Serialization: Serialize the list of machine basic blocks with simple ↵Alex Lorenz2015-06-191-0/+30
| | | | | | | | | | | | | | attributes. This commit implements the initial serialization of machine basic blocks in a machine function. Only the simple, scalar MBB attributes are serialized. The reference to LLVM IR's basic block is preserved when that basic block has a name. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10465 llvm-svn: 240145
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