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authorAlex Lorenz <arphaman@gmail.com>2015-07-14 21:24:41 +0000
committerAlex Lorenz <arphaman@gmail.com>2015-07-14 21:24:41 +0000
commit9fab370d79eb8c09bff29a8c0744060a15d63607 (patch)
tree35f18945d099d17f834ae58a3ca781be53d74831 /llvm/lib/CodeGen/MIRParser/MIRParser.cpp
parent15a00a858a8364e18545fb8d3c8311f696c5557d (diff)
downloadbcm5719-llvm-9fab370d79eb8c09bff29a8c0744060a15d63607.tar.gz
bcm5719-llvm-9fab370d79eb8c09bff29a8c0744060a15d63607.zip
MIR Serialization: Serialize the machine basic block live in registers.
llvm-svn: 242204
Diffstat (limited to 'llvm/lib/CodeGen/MIRParser/MIRParser.cpp')
-rw-r--r--llvm/lib/CodeGen/MIRParser/MIRParser.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index bfec6c59164..16b0e165589 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -321,6 +321,14 @@ bool MIRParserImpl::initializeMachineBasicBlock(
// TODO: Report an error when adding the same successor more than once.
MBB.addSuccessor(SuccMBB);
}
+ // Parse the liveins.
+ for (const auto &LiveInSource : YamlMBB.LiveIns) {
+ unsigned Reg = 0;
+ if (parseNamedRegisterReference(Reg, SM, MF, LiveInSource.Value, PFS,
+ IRSlots, Error))
+ return error(Error, LiveInSource.SourceRange);
+ MBB.addLiveIn(Reg);
+ }
// Parse the instructions.
for (const auto &MISource : YamlMBB.Instructions) {
MachineInstr *MI = nullptr;
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