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path: root/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
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* GlobalISel: produce correct code for signext/zeroext ABI flags.Tim Northover2016-09-211-3/+4
| | | | | | | | We still don't really have an equivalent of "AssertXExt" in DAG, so we don't exploit the guarantees on the receiving side yet, but this should produce conservatively correct code on iOS ABIs. llvm-svn: 282069
* GlobalISel: split aggregates for PCS loweringTim Northover2016-09-201-2/+4
| | | | | | | | | | | This should match the existing behaviour for passing complicated struct and array types, in particular HFAs come through like that from Clang. For C & C++ we still need to somehow support all the weird ABI flags, or at least those that are present in the IR (signext, byval, ...), and stack-based parameter passing. llvm-svn: 281977
* GlobalISel: legalize GEP instructions with small offsets.Tim Northover2016-09-151-0/+7
| | | | llvm-svn: 281602
* Fix another -Wunused-variable for non-assert build.Rui Ueyama2016-09-091-3/+4
| | | | llvm-svn: 281073
* Fix -Wunused-variable for non-assert build.Rui Ueyama2016-09-091-3/+2
| | | | llvm-svn: 281069
* GlobalISel: move type information to MachineRegisterInfo.Tim Northover2016-09-091-82/+70
| | | | | | | | | | | | | | | | | We want each register to have a canonical type, which means the best place to store this is in MachineRegisterInfo rather than on every MachineInstr that happens to use or define that register. Most changes following from this are pretty simple (you need an MRI anyway if you're going to be doing any transformations, so just check the type there). But legalization doesn't really want to check redundant operands (when, for example, a G_ADD only ever has one type) so I've made use of MCInstrDesc's operand type field to encode these constraints and limit legalization's work. As an added bonus, more validation is possible, both in MachineVerifier and MachineIRBuilder (coming soon). llvm-svn: 281035
* GlobalISel: use G_TYPE to annotate physregs with a type.Tim Northover2016-08-311-1/+2
| | | | | | | | | | More preparation for dropping source types from MachineInstrs: regsters coming out of already-selected code (i.e. non-generic instructions) don't have a type, but that information is needed so we must add it manually. This is done via a new G_TYPE instruction. llvm-svn: 280292
* GlobalISel: switch to SmallVector for pending legalizations.Tim Northover2016-08-291-6/+8
| | | | | | std::queue was doing far to many heap allocations to be healthy. llvm-svn: 279992
* GlobalISel: legalize frem to a libcall on AArch64.Tim Northover2016-08-291-0/+28
| | | | llvm-svn: 279988
* [MachineLegalize] Do not abort when the target wants to fall back.Quentin Colombet2016-08-271-2/+6
| | | | llvm-svn: 279904
* GlobalISel: simplify G_ICMP legalization regime.Tim Northover2016-08-261-30/+20
| | | | | | | | | | | | | | It's unclear how the old %res(32) = G_ICMP { s32, s32 } intpred(eq), %0, %1 is actually different from an s1 verison %res(1) = G_ICMP { s1, s32 } intpred(eq), %0, %1 so we'll remove it for now. llvm-svn: 279843
* GlobalISel: legalize sdiv and srem operations.Tim Northover2016-08-261-0/+29
| | | | llvm-svn: 279842
* GlobalISel: legalize under-width divisions.Tim Northover2016-08-261-0/+27
| | | | llvm-svn: 279841
* GlobalISel: perform multi-step legalizationTim Northover2016-08-251-2/+27
| | | | llvm-svn: 279758
* GlobalISel: make truncate/extend casts uniformTim Northover2016-08-231-11/+12
| | | | | | | They really should have both types represented, but early variants were created before MachineInstrs could have multiple types so they're rather ambiguous. llvm-svn: 279567
* GlobalISel: legalize integer comparisons on AArch64.Tim Northover2016-08-231-2/+34
| | | | | | | Next step is doing both legalizations at the same time! Marvel at GlobalISel's cunning. llvm-svn: 279566
* GlobalISel: legalize conditional branches on AArch64.Tim Northover2016-08-231-0/+7
| | | | llvm-svn: 279565
* GlobalISel: extend legalizer interface to handle multiple types.Tim Northover2016-08-231-7/+14
| | | | | | | | Instructions like G_ICMP have multiple types that may need to be legalized (the boolean output and nearly arbitrary inputs in this case). So the legalizer must be capable of deciding what to do for each of them separately. llvm-svn: 279554
* GlobalISel: legalize 1-bit load/store and mark 8/16 bit variants legal on ↵Tim Northover2016-08-231-5/+24
| | | | | | AArch64. llvm-svn: 279548
* GlobalISel: support legalization of G_FCONSTANTsTim Northover2016-08-191-0/+8
| | | | llvm-svn: 279341
* GlobalISel: teach legalizer how to handle integer constants.Tim Northover2016-08-191-1/+9
| | | | llvm-svn: 279340
* GlobalISel: improve representation of G_SEQUENCE and G_EXTRACTTim Northover2016-08-191-5/+12
| | | | | | | | | | | | First, make sure all types involved are represented, rather than being implicit from the register width. Second, canonicalize all types to scalar. These operations just act in bits and don't care about vectors. Also standardize spelling of Indices in the MachineIRBuilder (NFC here). llvm-svn: 279294
* GlobalISel: support translation of extractvalue instructions.Tim Northover2016-08-191-1/+1
| | | | llvm-svn: 279285
* GlobalISel: support overflow arithmetic intrinsics.Tim Northover2016-08-191-6/+10
| | | | | | | | | | | | Unsigned addition and subtraction can reuse the instructions created to legalize large width operations (i.e. both produce and consume a carry flag). Signed operations and multiplies get a dedicated op-with-overflow instruction. Once this is produced the two values are combined into a struct register (which will almost always be merged with a corresponding G_EXTRACT as part of legalization). llvm-svn: 279278
* GlobalISel: extend add widening to SUB, MUL, OR, AND and XOR.Tim Northover2016-08-041-2/+8
| | | | | | | These are the operations that are trivially identical. Division is omitted for now because you need to use the correct sign/zero extension. llvm-svn: 277775
* GlobalISel: implement narrowing for G_ADD.Tim Northover2016-08-041-1/+32
| | | | llvm-svn: 277769
* GlobalISel: add code to widen scalar G_ADDTim Northover2016-08-041-1/+24
| | | | llvm-svn: 277747
* GlobalISel: implement legalization pass, with just one transformation.Tim Northover2016-07-221-0/+98
This adds the actual MachineLegalizeHelper to do the work and a trivial pass wrapper that legalizes all instructions in a MachineFunction. Currently the only transformation supported is splitting up a vector G_ADD into one acting on smaller vectors. llvm-svn: 276461
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