GlobalISel: legalize integer comparisons on AArch64.

Next step is doing both legalizations at the same time! Marvel at GlobalISel's
cunning.

llvm-svn: 279566

1 files changed, 34 insertions, 2 deletions

diff --git a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
index f22cf358e77..2fb7f244c25 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
@@ -107,8 +107,6 @@ MachineLegalizeHelper::narrowScalar(MachineInstr &MI, unsigned TypeIdx,
 MachineLegalizeHelper::LegalizeResult
 MachineLegalizeHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx,
                                    LLT WideTy) {
-  assert(TypeIdx == 0 && "don't know how to handle secondary types yet");
-
   unsigned WideSize = WideTy.getSizeInBits();
   MIRBuilder.setInstr(MI);
 
@@ -180,6 +178,40 @@ MachineLegalizeHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx,
     MI.eraseFromParent();
     return Legalized;
   }
+  case TargetOpcode::G_ICMP: {
+    if (TypeIdx == 0) {
+      unsigned TstExt = MRI.createGenericVirtualRegister(WideSize);
+      MIRBuilder.buildICmp(
+          {WideTy, MI.getType(1)},
+          static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate()),
+          TstExt, MI.getOperand(2).getReg(), MI.getOperand(3).getReg());
+      MIRBuilder.buildTrunc(MI.getType(), MI.getOperand(0).getReg(), TstExt);
+      MI.eraseFromParent();
+      return Legalized;
+    } else {
+      bool IsSigned = CmpInst::isSigned(
+          static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate()));
+      unsigned Op0Ext = MRI.createGenericVirtualRegister(WideSize);
+      unsigned Op1Ext = MRI.createGenericVirtualRegister(WideSize);
+      if (IsSigned) {
+        MIRBuilder.buildSExt({WideTy, MI.getType(1)}, Op0Ext,
+                             MI.getOperand(2).getReg());
+        MIRBuilder.buildSExt({WideTy, MI.getType(1)}, Op1Ext,
+                             MI.getOperand(3).getReg());
+      } else {
+        MIRBuilder.buildZExt({WideTy, MI.getType(1)}, Op0Ext,
+                             MI.getOperand(2).getReg());
+        MIRBuilder.buildZExt({WideTy, MI.getType(1)}, Op1Ext,
+                             MI.getOperand(3).getReg());
+      }
+      MIRBuilder.buildICmp(
+          {MI.getType(0), WideTy},
+          static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate()),
+          MI.getOperand(0).getReg(), Op0Ext, Op1Ext);
+      MI.eraseFromParent();
+      return Legalized;
+    }
+  }
   }
 }