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* [LLDB] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-141-1/+1
| | | | | | | | | | Now that we've moved to C++14, we no longer need the llvm::make_unique implementation from STLExtras.h. This patch is a mechanical replacement of (hopefully) all the llvm::make_unique instances across the monorepo. Differential revision: https://reviews.llvm.org/D66259 llvm-svn: 368933
* Don't check the validity of newly contructed data buffersPavel Labath2019-07-011-7/+0
| | | | | | | | | | A bunch of places were checking that DataBufferHeap::GetBytes returns a non-null pointer right after constructing it. The only time when GetBytes returns a null pointer is if it is empty (and I'm not sure that even this is a good idea), but that is clearly not the case here, as the buffer was constructed with a non-zero size just a couple of lines back. llvm-svn: 364754
* Remove null checks of results of new expressionsPavel Labath2019-07-011-7/+0
| | | | | | | | operator new doesn't return a null pointer, even if one turns off exceptions (it calls std::terminate instead). Therefore, all of this is dead code. llvm-svn: 364744
* [NFC] Remove ASCII lines from commentsJonas Devlieghere2019-04-101-2/+0
| | | | | | | | | | | | | | | | | | | | | | | A lot of comments in LLDB are surrounded by an ASCII line to delimit the begging and end of the comment. Its use is not really consistent across the code base, sometimes the lines are longer, sometimes they are shorter and sometimes they are omitted. Furthermore, it looks kind of weird with the 80 column limit, where the comment actually extends past the line, but not by much. Furthermore, when /// is used for Doxygen comments, it looks particularly odd. And when // is used, it incorrectly gives the impression that it's actually a Doxygen comment. I assume these lines were added to improve distinguishing between comments and code. However, given that todays editors and IDEs do a great job at highlighting comments, I think it's worth to drop this for the sake of consistency. The alternative is fixing all the inconsistencies, which would create a lot more churn. Differential revision: https://reviews.llvm.org/D60508 llvm-svn: 358135
* Replace 'ap' with 'up' suffix in variable names. (NFC)Jonas Devlieghere2019-02-131-9/+9
| | | | | | | | | | | | | | | | | The `ap` suffix is a remnant of lldb's former use of auto pointers, before they got deprecated. Although all their uses were replaced by unique pointers, some variables still carried the suffix. In r353795 I removed another auto_ptr remnant, namely redundant calls to ::get for unique_pointers. Jim justly noted that this is a good opportunity to clean up the variable names as well. I went over all the changes to ensure my find-and-replace didn't have any undesired side-effects. I hope I didn't miss any, but if you end up at this commit doing a git blame on a weirdly named variable, please know that the change was unintentional. llvm-svn: 353912
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* Remove header grouping comments.Jonas Devlieghere2018-11-111-3/+0
| | | | | | | | This patch removes the comments grouping header includes. They were added after running IWYU over the LLDB codebase. However they add little value, are often outdates and burdensome to maintain. llvm-svn: 346626
* Move RegisterValue,Scalar,State from Core to UtilityPavel Labath2018-08-071-1/+1
| | | | | | | | | | | | | These three classes have no external dependencies, but they are used from various low-level APIs. Moving them down to Utility improves overall code layering (although it still does not break any particular dependency completely). The XCode project will need to be updated after this change. Differential Revision: https://reviews.llvm.org/D49740 llvm-svn: 339127
* Reflow paragraphs in comments.Adrian Prantl2018-04-301-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is intended as a clean up after the big clang-format commit (r280751), which unfortunately resulted in many of the comment paragraphs in LLDB being very hard to read. FYI, the script I used was: import textwrap import commands import os import sys import re tmp = "%s.tmp"%sys.argv[1] out = open(tmp, "w+") with open(sys.argv[1], "r") as f: header = "" text = "" comment = re.compile(r'^( *//) ([^ ].*)$') special = re.compile(r'^((([A-Z]+[: ])|([0-9]+ )).*)|(.*;)$') for line in f: match = comment.match(line) if match and not special.match(match.group(2)): # skip intentionally short comments. if not text and len(match.group(2)) < 40: out.write(line) continue if text: text += " " + match.group(2) else: header = match.group(1) text = match.group(2) continue if text: filled = textwrap.wrap(text, width=(78-len(header)), break_long_words=False) for l in filled: out.write(header+" "+l+'\n') text = "" out.write(line) os.rename(tmp, sys.argv[1]) Differential Revision: https://reviews.llvm.org/D46144 llvm-svn: 331197
* Clean up NativeRegisterContextPavel Labath2017-11-101-8/+6
| | | | | | | | | | | | | | | | | | | | | Summary: This commit removes the concrete_frame_idx member from NativeRegisterContext and related functions, which was always set to zero and never used. I also change the native thread class to store a NativeRegisterContext as a unique_ptr (documenting the ownership) and make sure it is always initialized (most of the code was already blindly dereferencing the register context pointer, assuming it would always be present -- this makes its treatment consistent). Reviewers: eugene, clayborg, krytarowski Subscribers: aemerson, sdardis, nemanjai, javed.absar, arichardson, kristof.beyls, kbarton, uweigand, alexandreyy, lldb-commits Differential Revision: https://reviews.llvm.org/D39837 llvm-svn: 317881
* Simplify NativeProcessProtocol::GetArchitecture/GetByteOrderPavel Labath2017-11-091-7/+5
| | | | | | | | | | | | | | | | | | | Summary: These functions used to return bool to signify whether they were able to retrieve the data. This is redundant because the ArchSpec and ByteOrder already have their own "invalid" states, *and* because both of the current implementations (linux, netbsd) can always provide a valid result. This allows us to simplify bits of the code handling these values. Reviewers: eugene, krytarowski Subscribers: javed.absar, lldb-commits Differential Revision: https://reviews.llvm.org/D39733 llvm-svn: 317779
* Fix linux arm and mips builds broken by r308282Pavel Labath2017-07-181-2/+2
| | | | llvm-svn: 308292
* Rename Error -> Status.Zachary Turner2017-05-121-48/+49
| | | | | | | | | | | | | | | This renames the LLDB error class to Status, as discussed on the lldb-dev mailing list. A change of this magnitude cannot easily be done without find and replace, but that has potential to catch unwanted occurrences of common strings such as "Error". Every effort was made to find all the obvious things such as the word "Error" appearing in a string, etc, but it's possible there are still some lingering occurences left around. Hopefully nothing too serious. llvm-svn: 302872
* [LLDB][MIPS] Core Dump Support.Nitesh Jain2017-03-311-157/+29
| | | | | | | | | | Reviewers: labath, emaste Subscribers: jaydeep, bhushan, lldb-commits, slthakur Differential Revision: https://reviews.llvm.org/D30457 llvm-svn: 299200
* Move DataBuffer / DataExtractor and friends from Core -> Utility.Zachary Turner2017-03-041-1/+1
| | | | llvm-svn: 296943
* Move Log from Core -> Utility.Zachary Turner2017-03-031-1/+1
| | | | | | | | | All references to Host and Core have been removed, so this class can now safely be lowered into Utility. Differential Revision: https://reviews.llvm.org/D30559 llvm-svn: 296909
* Use LLDB_LOG in NativeRegisterContextLinux*** filesPavel Labath2017-02-031-44/+21
| | | | llvm-svn: 294023
* Move classes from Core -> Utility.Zachary Turner2017-02-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | This moves the following classes from Core -> Utility. ConstString Error RegularExpression Stream StreamString The goal here is to get lldbUtility into a state where it has no dependendencies except on itself and LLVM, so it can be the starting point at which to start untangling LLDB's dependencies. These are all low level and very widely used classes, and previously lldbUtility had dependencies up to lldbCore in order to use these classes. So moving then down to lldbUtility makes sense from both the short term and long term perspective in solving this problem. Differential Revision: https://reviews.llvm.org/D29427 llvm-svn: 293941
* android-mips: define PTRACE_GETREGSET in headers don't do itPavel Labath2017-01-241-0/+3
| | | | | | | PTRACE_GETREGSET is only defined on mips only since api level 21. Define it ourselves, so we can compile with older platform headers. llvm-svn: 292936
* Revert unwanted changes in lldb when updating llvm::Error()Mehdi Amini2016-11-111-1/+1
| | | | | | | | My script updated lldb::Errors, and I failed to fix it entirely before pushing. This restore everything in lldb as it was before r286561. llvm-svn: 286565
* Make the Error class constructor protectedMehdi Amini2016-11-111-1/+1
| | | | | | | | | This is forcing to use Error::success(), which is in a wide majority of cases a lot more readable. Differential Revision: https://reviews.llvm.org/D26481 llvm-svn: 286561
* [LLDB][MIPS] fix Floating point register read/write for big endianNitesh Jain2016-10-121-77/+86
| | | | | | | | | | Reviewers: clayborg, labath, jaydeep Subscribers: bhushan, slthakur, lldb-commits Differential Revision: https://reviews.llvm.org/D24603 llvm-svn: 284003
* *** This commit represents a complete reformatting of the LLDB source codeKate Stone2016-09-061-1196/+952
| | | | | | | | | | | | | | | | | | | | | | | *** to conform to clang-format’s LLVM style. This kind of mass change has *** two obvious implications: Firstly, merging this particular commit into a downstream fork may be a huge effort. Alternatively, it may be worth merging all changes up to this commit, performing the same reformatting operation locally, and then discarding the merge for this particular commit. The commands used to accomplish this reformatting were as follows (with current working directory as the root of the repository): find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} + find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ; The version of clang-format used was 3.9.0, and autopep8 was 1.2.4. Secondly, “blame” style tools will generally point to this commit instead of a meaningful prior commit. There are alternatives available that will attempt to look through this change and find the appropriate prior commit. YMMV. llvm-svn: 280751
* [LLVM][MIPS] Revert support for FRE.Nitesh Jain2016-07-181-2/+4
| | | | | | | Reviewers: jaydeep Subscribers: bhushan, mohit.bhakkad, slthakur, llvm-commits llvm-svn: 275785
* Try to fix the mips64 build after rL257447Tamas Berghammer2016-01-121-1/+1
| | | | llvm-svn: 257469
* [LLDB][MIPS] Fix ReadRegisterValue for registers with constant 32 bit size ↵Mohit K. Bhakkad2016-01-121-1/+9
| | | | | | | | | | regardless of ABI Reviewers: clayborg, tberghammer. Subscribers: jaydeep, bhushan, sagar, nitesh.jain, lldb-commits. Differential Revision: http://reviews.llvm.org/D16060 llvm-svn: 257447
* [LLDB][MIPS] Make register read/write to set/get the size of register ↵Sagar Thakur2016-01-051-3/+9
| | | | | | | | | | | | | | according to abi. Summary: For O32 abi register size should be 4 bytes. For N32 and N64 abi register size should be 8 bytes. This patch will make register read/write to set/get the size of register according to abi. Reviewers: clayborg, tberghammer Subscribers: lldb-commits, nitesh.jain, mohit.bhakkad, bhushan, jaydeep Differential: http://reviews.llvm.org/D15884 llvm-svn: 256834
* [LLDB][MIPS] Adding call to IsMSAAvailable() while creating ↵Sagar Thakur2015-12-091-4/+8
| | | | | | | | RegisterInfoInterface This patch will fix the test case test_p_returns_correct_data_size_for_each_qRegisterInfo_attach_llgs_* of TestLldbGdbServer.py on mips. The test fails because we were sending RegisterInfo for msa registers to client even when msa registers are not available. With this commit server will send E45(end of resigters) response if msa registers are not available. llvm-svn: 255108
* [LLDB][MIPS] Using enum instead of a constant to fetch PC and CAUSE registers.Jaydeep Patil2015-12-031-2/+2
| | | | | | | SUMMARY: Using enum instead of a constant to fetch PC and CAUSE registers. llvm-svn: 254590
* [LLDB][MIPS] Clear bug 25194 - LLDB-Server Assertion raised when single ↵Sagar Thakur2015-12-011-0/+3
| | | | | | | | | | | | | | | | | | | stepping on MIPS This patch will clear bug 25194 - LLDB-Server Assertion raised when single stepping on MIPS. The problem was that while emulating instructions, old and new pc values would have garbage value in their upper 32 bits. Therefore checking if pc was changed (old_pc == new_pc) would always return false, because of which pc was not getting updated. /* If we haven't changed the PC, change it here */ if (old_pc == new_pc) { new_pc += 4; Context context; return false; } Reviewers: tberghammer, clayborg Subscribers: dsanders, lldb-commits, mohit.bhakkad, bhushan, jaydeep, nitesh.jain Differential: http://reviews.llvm.org/D14633 llvm-svn: 254379
* [LLDB][MIPS] Getting 0 index for H/W watchpoint is not necessarily an errorMohit K. Bhakkad2015-11-231-2/+2
| | | | | | | | Reviewers: jaydeep. Subscribers: bhushan, sagar, nitesh.jain, lldb-commits. Differential Revision: http://reviews.llvm.org/D14860 llvm-svn: 253864
* [LLDB][MIPS] Use the correct ptrace buffer for writing register value for ↵Sagar Thakur2015-10-191-8/+9
| | | | | | | | | o32 applications For o32 applications on mips we were getting segmentation fault while launching lldb-server because of overwritting stack when using elf_gregset_t in DoWriteRegisterValue. We are now using the GPR_mips_linux buffer in DoWriteRegisterValue as done in DoReadRegisterValue also, which solves the above issue. llvm-svn: 250696
* [LLDB][MIPS] Fix gp register value for o32 applications on 64-bit targetSagar Thakur2015-10-011-8/+1
| | | | | | | GP registers for o32 applications were always giving zero value because SetType() on the RegisterValue was causing the accessor functions to pickup the value from m_scalar of RegisterValue which is zero. In this patch byte size and byte order of register value is set at the time of setting the value of the register. llvm-svn: 249020
* Clean up register naming conventions inside lldb. Jason Molenda2015-09-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "gcc" register numbers are now correctly referred to as "ehframe" register numbers. In almost all cases, ehframe and dwarf register numbers are identical (the one exception is i386 darwin where ehframe regnums were incorrect). The old "gdb" register numbers, which I incorrectly thought were stabs register numbers, are now referred to as "Process Plugin" register numbers. This is the register numbering scheme that the remote process controller stub (lldb-server, gdbserver, core file support, kdp server, remote jtag devices, etc) uses to refer to the registers. The process plugin register numbers may not be contiguous - there are remote jtag devices that have gaps in their register numbering schemes. I removed all of the enums for "gdb" register numbers that we had in lldb - these were meaningless - and I put LLDB_INVALID_REGNUM in all of the register tables for the Process Plugin regnum slot. This change is almost entirely mechnical; the one actual change in here is to ProcessGDBRemote.cpp's ParseRegisters() which parses the qXfer:features:read:target.xml response. As it parses register definitions from the xml, it will assign sequential numbers as the eRegisterKindLLDB numbers (the lldb register numberings must be sequential, without any gaps) and if the xml file specifies register numbers, those will be used as the eRegisterKindProcessPlugin register numbers (and those may have gaps). A J-Link jtag device's target.xml does contain a gap in register numbers, and it only specifies the register numbers for the registers after that gap. The device supports many different ARM boards and probably selects different part of its register file as appropriate. http://reviews.llvm.org/D12791 <rdar://problem/22623262> llvm-svn: 247741
* Fix build on mipsSagar Thakur2015-08-251-10/+3
| | | | | | | | | | Setting and getting register values as bytes instead of depending on the 128 bit integer support in register value. This patch will fix the build failure in the release branch. Reviewers: tberghammer, clayborg, hans Subscribers: bhushan, nitesh.jain, jaydeep, lldb-commits Differential: http://reviews.llvm.org/D12275 llvm-svn: 245927
* [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 ↵Sagar Thakur2015-08-171-54/+312
| | | | | | | | | | | | | | | | mode support This patch : - Fixes offsets of all register sets for Mips. - Adds MSA register set and FRE=1 mode support for FP register set. - Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64. - Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers. Reviewers: jaydeep, clayborg, jasonmolenda, ovyalov, emaste Subscribers: tberghammer, ovyalov, emaste, mohit.bhakkad, nitesh.jain, bhushan Differential: http://reviews.llvm.org/D10919 llvm-svn: 245217
* [LLDB][MIPS] Handle false positives for MIPS hardware watchpointsJaydeep Patil2015-08-131-1/+103
| | | | | | | | | | | | | | | | SUMMARY: Last 3bits of the watchpoint address are masked by the kernel. For example, n is at 0x120010d00 and m is 0x120010d04. When a watchpoint is set at m, then watch exception is generated even when n is read/written. To handle this case, instruction at PC is emulated to find the base address of the load/store instruction. This address is then appended to the description of the stop-info packet. Client then reads this information to check whether the user has set a watchpoint on this address. Reviewers: jingham, clayborg Subscribers: nitesh.jain, mohit.bhakkad, sagar, bhushan and lldb-commits Differential Revision: http://reviews.llvm.org/D11672 llvm-svn: 244864
* Revert r244308 since it's introducing test regressions on Linux:Oleksiy Vyalov2015-08-101-312/+54
| | | | | | | | - TestLldbGdbServer.py both clang & gcc, i386 and x86_64 - TestConstVariables.py gcc, i386 and x86_64 - 112 failures clang, i386 llvm-svn: 244514
* [LLDB][MIPS] Fix offsets of all register sets and add MSA regset and FRE=1 ↵Sagar Thakur2015-08-071-54/+312
| | | | | | | | | | | | | | | | | | mode support This change : - Fixes offsets of all register sets for Mips. - Adds MSA register set and FRE=1 mode support for FP register set. - Separates lldb register numbers and register infos of freebsd/mips64 from linux/mips64. - Re-orders the register numbers of all kinds for mips to be consistent with freebsd order of register numbers. - Eliminates ENABLE_128_BIT_SUPPORT and union ValueData from Scalar.cpp and uses llvm::APInt and llvm::APFloat for all integer and floating point types. Reviewers : emaste, jaydeep, clayborg Subscribers : emaste, mohit.bhakkad, nitesh.jain, bhushan Differential : http://reviews.llvm.org/D10919 llvm-svn: 244308
* [NativeProcessLinux] Integrate MainLoopPavel Labath2015-07-211-40/+8
| | | | | | | | | | | | | | | | | | | Summary: This commit integrates MainLoop into NativeProcessLinux. By registering a SIGCHLD handler with the llgs main loop, we can get rid of the special monitor thread in NPL, which saves as a lot of thread ping-pong when responding to client requests (e.g. qThreadInfo processing time has been reduced by about 40%). It also makes the code simpler, IMHO. Reviewers: ovyalov, clayborg, tberghammer, chaoren Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D11150 This is a resubmission of r242305 after it was reverted due to bad interactions with the stdio thread. llvm-svn: 242783
* Revert "[NativeProcessLinux] Integrate MainLoop"Pavel Labath2015-07-161-8/+40
| | | | | | This seems to be causing major slowdows on the android buildbot. Reverting while I investigate. llvm-svn: 242391
* [NativeProcessLinux] Integrate MainLoopPavel Labath2015-07-151-40/+8
| | | | | | | | | | | | | | | | Summary: This commit integrates MainLoop into NativeProcessLinux. By registering a SIGCHLD handler with the llgs main loop, we can get rid of the special monitor thread in NPL, which saves as a lot of thread ping-pong when responding to client requests (e.g. qThreadInfo processing time has been reduced by about 40%). It also makes the code simpler, IMHO. Reviewers: ovyalov, clayborg, tberghammer, chaoren Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D11150 llvm-svn: 242305
* [NativeProcessLinux] Refactor PtraceWrapperPavel Labath2015-06-301-13/+5
| | | | | | | | | | | | | | | | | Summary: This changes PtraceWrapper to return an Error, while the actual result is in an pointer parameter (instead of the other way around). Also made a couple of PtraceWrapper arguments default to zero. This arrangement makes a lot of the code much simpler. Test Plan: Tests pass on linux. It compiles on android arm64/mips64. Reviewers: chaoren, mohit.bhakkad Subscribers: tberghammer, aemerson, lldb-commits Differential Revision: http://reviews.llvm.org/D10808 llvm-svn: 241079
* [NativeProcessLinux] Use lambdas in DoOperation callsPavel Labath2015-06-261-149/+71
| | | | | | | | | | | | | | | | | | | Summary: This removes a lot of boilerplate, which was needed to execute monitor operations. Previously one needed do declare a separate class for each operation which would manually capture all needed arguments, which was very verbose. In addition to less code, I believe this also makes the code more readable, since now the implementation of the operation can be physically closer to the code that invokes it. Test Plan: Code compiles on x86, arm and mips, tests pass on x86 linux. Reviewers: tberghammer, chaoren Subscribers: aemerson, lldb-commits Differential Revision: http://reviews.llvm.org/D10694 llvm-svn: 240772
* [LLDB][MIPS] MIPS32 branch emulation and single-steppingJaydeep Patil2015-06-231-0/+52
| | | | | | | | | | | | | | | SUMMARY: This patch implements 1. Emulation of MIPS32 branch instructions 2. Enable single-stepping for MIPS32 instructions 3. Correction in emulation of MIPS64 branch instructions with delay slot 4. Adjust breakpoint address when breakpoint is hit in a forbidden slot of compact branch instruction Reviewers: clayborg Subscribers: mohit.bhakkad, sagar, bhushan, lldb-commits, emaste, nitesh.jain Differential Revision: http://reviews.llvm.org/D10596 llvm-svn: 240373
* [LLDB][MIPS] Addressing some errors and warnings due to rL239991Mohit K. Bhakkad2015-06-181-7/+13
| | | | llvm-svn: 240016
* [LLDB][MIPS] Hardware Watchpoints for MIPSMohit K. Bhakkad2015-06-181-8/+408
| | | | | | | | Reviewers: clayborg, jingham. Subscribers: jaydeep, bhushan, dsanders, sagar, lldb-commits. Differential Revision: http://reviews.llvm.org/D9142 llvm-svn: 239991
* [lldb-server][MIPS] Read/Write FP registers in FR0 modeSagar Thakur2015-06-051-0/+57
| | | | | | | | | | Adding support for read/write FP registers in FR0 mode of mips. Reviewers: clayborg, tberghammer, jaydeep Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits Differential Revision: http://reviews.llvm.org/D10242 llvm-svn: 239132
* [MIPS][lldb-server] Add 32-bit register context and read/write FP registers ↵Sagar Thakur2015-06-031-52/+386
| | | | | | | | | | | | | on mips64 - Added support for read/write FP registers in FR1 mode. - Added 32 bit register context for mips32. Reviewers: clayborg, tberghammer, jaydeep Subscribers: emaste, nitesh.jain, bhushan, mohit.bhakkad, lldb-commits Differential Revision: http://reviews.llvm.org/D10029 llvm-svn: 238914
* Move register reading form NativeProcessLinux to NativeRegisterContextLinux*Tamas Berghammer2015-05-261-68/+107
| | | | | | | | | | | | | | | | | This change reorganize the register read/write code inside lldb-server on Linux with moving the architecture independent code into a new class called NativeRegisterContextLinux and all of the architecture dependent code into the appropriate NativeRegisterContextLinux_* class. As part of it the compilation of the architecture specific register contexts are only compiled on the specific architecture because they can't be used in other cases. The purpose of this change is to remove a lot of duplicated code from the different register contexts and to remove the architecture dependent codes from the global NativeProcessLinux class. Differential revision: http://reviews.llvm.org/D9935 llvm-svn: 238196
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