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* [ARM] Replace arm_neon_vqadds with sadd_satDavid Green2019-11-271-44/+44
| | | | | | | | | | This replaces the A32 NEON vqadds, vqaddu, vqsubs and vqsubu intrinsics with the target independent sadd_sat, uadd_sat, ssub_sat and usub_sat. This helps generate vqadds from standard IR nodes, which might be produced from the vectoriser. The old variants are removed in the process. Differential Revision: https://reviews.llvm.org/D69350
* Recommit ARM-NEON: make type modifiers orthogonal and allow multiple modifiers.Tim Northover2019-11-261-0/+7
| | | | | | | | | | | | | | | | | | The modifier system used to mutate types on NEON intrinsic definitions had a separate letter for all kinds of transformations that might be needed, and we were quite quickly running out of letters to use. This patch converts to a much smaller set of orthogonal modifiers that can be applied together to achieve the desired effect. When merging with downstream it is likely to cause a conflict with any local modifications to the .td files. There is a new script in utils/convert_arm_neon.py that was used to convert all .td definitions and I would suggest running it on the last downstream version of those files before this commit rather than resolving conflicts manually. The original version broke vcreate_* because it became a macro and didn't apply the normal integer promotion rules before bitcasting to a vector. This adds a temporary.
* NeonEmitter: remove special 'a' type modifier.Tim Northover2019-11-061-22/+22
| | | | | | | | 'a' used to implement a splat in C++ code in NeonEmitter.cpp, but this can be done directly from .td expansions now (and most ops already did). So removing it simplifies the overall code. https://reviews.llvm.org/D69716
* [IRBuilder] Update IRBuilder::CreateFNeg(...) to return a UnaryOperatorCameron McInally2019-10-141-4/+4
| | | | | | | | Reapply r374240 with fix for Ocaml test, namely Bindings/OCaml/core.ml. Differential Revision: https://reviews.llvm.org/D61675 llvm-svn: 374782
* [ARM] Fix arm_neon.h with -flax-vector-conversions=none, part 2.Eli Friedman2019-10-101-10/+11
| | | | | | | | | | | | | | | | | | | | | Just running -fsyntax-only over arm_neon.h doesn't cover some intrinsics which are defined using macros. Add more test coverage for that. arm-neon-header.c wasn't checking the full set of available NEON target features; change the target architecture of the test to account for that. Fix the generator for arm_neon.h to generate casts in more cases where they are necessary. Fix VFMLAL_LOW etc. to express their signatures differently, so the builtins have the expected type. Maybe the TableGen backend should detect intrinsics that are defined the wrong way, and produce an error. The rules here are sort of strange. Differential Revision: https://reviews.llvm.org/D68743 llvm-svn: 374419
* Revert "[IRBuilder] Update IRBuilder::CreateFNeg(...) to return a UnaryOperator"Dmitri Gribenko2019-10-101-4/+4
| | | | | | | This reverts commit r374240. It broke OCaml tests: http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/19014 llvm-svn: 374354
* [IRBuilder] Update IRBuilder::CreateFNeg(...) to return a UnaryOperatorCameron McInally2019-10-091-4/+4
| | | | | | | | Also update Clang to call Builder.CreateFNeg(...) for UnaryMinus. Differential Revision: https://reviews.llvm.org/D61675 llvm-svn: 374240
* [ARM] Fix arm_neon.h with -flax-vector-conversions=noneEli Friedman2019-10-091-108/+36
| | | | | | | | | | | | | | Really, we were already 99% of the way there; just needed a couple minor fixes that affected 64-bit-only builtins. Based on D61717. Note that the change to builtin_str changes the type of a few __builtin_neon_* intrinsics that had the "wrong" type. Fixes https://bugs.llvm.org/show_bug.cgi?id=43341 Differential Revision: https://reviews.llvm.org/D68683 llvm-svn: 374191
* [CodeGen][ARM] Coerce FP16 vectors to integer vectors when neededMikhail Maltsev2018-09-121-121/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: On targets that do not support FP16 natively LLVM currently legalizes vectors of FP16 values by scalarizing them and promoting to FP32. This causes problems for the following code: void foo(int, ...); typedef __attribute__((neon_vector_type(4))) __fp16 float16x4_t; void bar(float16x4_t x) { foo(42, x); } According to the AAPCS (appendix A.2) float16x4_t is a containerized vector fundamental type, so 'foo' expects that the 4 16-bit FP values are packed into 2 32-bit registers, but instead bar promotes them to 4 single precision values. Since we already handle scalar FP16 values in the frontend by bitcasting them to/from integers, this patch adds similar handling for vector types and homogeneous FP16 vector aggregates. One existing test required some adjustments because we now generate more bitcasts (so the patch changes the test to target a machine with native FP16 support). Reviewers: eli.friedman, olista01, SjoerdMeijer, javed.absar, efriedma Reviewed By: javed.absar, efriedma Subscribers: efriedma, kristof.beyls, cfe-commits, chrib Differential Revision: https://reviews.llvm.org/D50507 llvm-svn: 342034
* [NEON] Support vldNq intrinsics in AArch32 (Clang part)Ivan A. Kosarev2018-06-271-315/+0
| | | | | | | | | This patch reworks the support for dup NEON intrinsics as described in D48439. Differential Revision: https://reviews.llvm.org/D48440 llvm-svn: 335734
* Revert r330195 "[NEON] Define vget_high_f16() and vget_low_f16() intrinsics ↵Ivan A. Kosarev2018-04-181-0/+14
| | | | | | | | in AArch64 mode only". Differential Revision: https://reviews.llvm.org/D45668 llvm-svn: 330248
* [NEON] Define vget_high_f16() and vget_low_f16() intrinsics in AArch64 mode onlyIvan A. Kosarev2018-04-171-14/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D45668 llvm-svn: 330195
* Generalize NRVO to cover C structs.Akira Hatanaka2018-03-291-432/+216
| | | | | | | | | | | This commit generalizes NRVO to cover C structs (both trivial and non-trivial structs). rdar://problem/33599681 Differential Revision: https://reviews.llvm.org/D44968 llvm-svn: 328809
* This reverts "r327189 - [ARM] Add ARMv8.2-A FP16 vector intrinsic"Sjoerd Meijer2018-03-131-117/+123
| | | | | | | This is causing problems in testing, and PR36683 was raised. Reverting it until we have sorted out how to pass f16 vectors. llvm-svn: 327437
* [ARM] Add ARMv8.2-A FP16 vector intrinsicAbderrazek Zaafrani2018-03-091-123/+117
| | | | | | | | Add the fp16 neon vector intrinsic for ARM as described in the ARM ACLE document. Reviews in https://reviews.llvm.org/D43650 llvm-svn: 327189
* Change memcpy/memove/memset to have dest and source alignment attributes ↵Daniel Neilson2018-01-191-222/+222
| | | | | | | | | | | | | | | | | | | | | | | | | | | (Step 1). Summary: Upstream LLVM is changing the the prototypes of the @llvm.memcpy/memmove/memset intrinsics. This change updates the Clang tests for this change. The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument which is required to be a constant integer. It represents the alignment of the dest (and source), and so must be the minimum of the actual alignment of the two. This change removes the alignment argument in favour of placing the alignment attribute on the source and destination pointers of the memory intrinsic call. For example, code which used to read: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false) will now read call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false) At this time the source and destination alignments must be the same (Step 1). Step 2 of the change, to be landed shortly, will relax that contraint and allow the source and destination to have different alignments. llvm-svn: 322964
* [AArch64] Enable fp16 data type for the Builtin for AArch64 only.Abderrazek Zaafrani2017-12-211-117/+123
| | | | | | Differential Revision: https:://reviews.llvm.org/D41360 llvm-svn: 321301
* [AARch64] Add ARMv8.2-A FP16 vector intrinsicsAbderrazek Zaafrani2017-12-211-123/+117
| | | | | | | | Putting back the code that was reverted few weeks ago. Differential Revision: https://reviews.llvm.org/D34161 llvm-svn: 321294
* This reverts r305820 (ARMv.2-A FP16 vector intrinsics) because it showsSjoerd Meijer2017-07-061-117/+123
| | | | | | | | problems in testing, see comments in D34161 for some more details. A fix is in progres in D35011, but a revert seems better now as the fix will probably take some more time to land. llvm-svn: 307277
* [AArch64] ADD ARMv.2-A FP16 vector intrinsicsAbderrazek Zaafrani2017-06-201-123/+117
| | | | | | Differential Revision: https://reviews.llvm.org/D34161 llvm-svn: 305820
* Enable the ARM Neon intrinsics test by default.Alexander Kornienko2017-05-311-2/+0
| | | | | | | | | | | | The test being marked 'REQUIRES: long-tests' doesn't make sense. It's not the first time the test is broken without being noticed by the committer. If the test is too long, it should be shortened, split in multiple ones or removed altogether. Keeping it as is is actively harmful. (BTW, on my machine `ninja check-clang` takes 90-92 seconds with and without this test. The difference in times is below the spread caused by random factors.) llvm-svn: 304302
* Revert "[ARM] Update long-test after r304201."Alexander Kornienko2017-05-311-618/+618
| | | | | | | | | This reverts commit 304208, since r304201 has been reverted as well. The test needs to be turned on by default to detect breakages earlier. Will commit this change separately. llvm-svn: 304301
* [ARM] Update long-test after r304201.Benjamin Kramer2017-05-301-618/+618
| | | | llvm-svn: 304208
* Unbreak long test after r304127.Benjamin Kramer2017-05-291-1/+2
| | | | llvm-svn: 304167
* Fix tests after speculatable intrinsics patchDaniel Jasper2017-05-031-541/+541
| | | | | | These were relying on the attribute group numbering llvm-svn: 302009
* Update for LLVM changesDavid Majnemer2016-07-261-5504/+3125
| | | | | | | InstSimplify has gained the ability to remove needless bitcasts which perturbed some clang codegen tests. llvm-svn: 276756
* [ARM NEON] Define vfms_f32 on ARM, and all vfms using vfma.Ahmed Bougacha2016-04-191-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r259537 added vfma/vfms to armv7, but the builtin was only lowered on the AArch64 side. Instead of supporting it on ARM, get rid of it. The vfms builtin lowered to: %nb = fsub float -0.0, %b %r = @llvm.fma.f32(%a, %nb, %c) Instead, define the operation in terms of vfma, and swap the multiplicands. It now lowers to: %na = fsub float -0.0, %a %r = @llvm.fma.f32(%na, %b, %c) This matches the instruction more closely, and lets current LLVM generate the "natural" operand ordering: fmls.2s v0, v1, v2 instead of the crooked (but equivalent): fmls.2s v0, v2, v1 Except for theses changes, assembly is identical. LLVM accepts both commutations, and the LLVM tests in: test/CodeGen/AArch64/arm64-fmadd.ll test/CodeGen/AArch64/fp-dp3.ll test/CodeGen/AArch64/neon-fma.ll test/CodeGen/ARM/fusedMAC.ll already check either the new one only, or both. Also verified against the test-suite unittests. llvm-svn: 266807
* ARM: fix arm_neon_intrinsics.c and re-enable.Tim Northover2016-03-101-6882/+6469
| | | | | | | It turns out I'd never actually tested my recent change because it was gated on long-tests. Failure ensued. llvm-svn: 263093
* Disable failing test and fix RUN line.Richard Trieu2016-03-101-2/+3
| | | | | | | | See https://llvm.org/bugs/show_bug.cgi?id=26894 for details. This change fixes the incorrect flags to Clang and the piping issue. It also disables the FileCheck portion of the test, which is currently failing. llvm-svn: 263091
* ARM & AArch64: convert asm tests to LLVM IR and restrict optimizations.Tim Northover2016-03-091-3693/+16315
| | | | | | | | | | | | | | | This is mostly a one-time autoconversion of tests that checked assembly after "-Owhatever" compiles to only run "opt -mem2reg" and check the assembly. This should make them much more stable to changes in LLVM so they won't break on unrelated changes. "opt -mem2reg" is a compromise designed to increase the readability of tests that check dataflow, while minimizing dependency on LLVM. Hopefully mem2reg is stable enough that no surpises will come along. Should address http://llvm.org/PR26815. llvm-svn: 263048
* This patch makes the NEON intrinsics vget_lane_f16, vgetq_lane_f16,Luke Cheeseman2015-06-121-0/+24
| | | | | | | | vset_lane_f16 and vsetq_lane_f16 available in AArch32. Differential Revision: http://reviews.llvm.org/D10388 llvm-svn: 239610
* [test/CodeGen/ARM] Update arm_neon_intrinsics test case to actually test theQuentin Colombet2014-08-261-22/+82
| | | | | | | | | lowering of the intrinsics. Prior to this commit, most of the copy-related intrinsics could be optimized away. The situation is still not ideal as there are several possibilities to lower a given intrinsic. Currently, we match LLVM behavior. llvm-svn: 216474
* [test/CodeGen/ARM] Adpat test to match new codegen after r216274.Quentin Colombet2014-08-221-29/+29
| | | | | | | | | | | Moreover, rework some patterns to actually check the emitted instructions instead of matching unrelated string! E.g., some of the "// CHECK: vmov" were matching stuff like ".globl funcname_with_vmov" instead of actual instructions. llvm-svn: 216275
* [test/CodeGen/ARM] Adpat test to match new codegen after r216236.Quentin Colombet2014-08-221-9/+9
| | | | llvm-svn: 216249
* CHECK-LABEL'ify this test.James Molloy2014-06-251-1965/+1965
| | | | llvm-svn: 211687
* [AArch32] Fix a stupid error in an architectural guardJames Molloy2014-06-251-33/+49
| | | | | | The < 8 instead of <= 8 meant that a bunch of vreinterprets were not available on v8 AArch32. Simplify the guard to just !defined(aarch64) while we're at it, and enable some v8 AArch32 testing. llvm-svn: 211686
* ARM NEON: fix tests after r202137Tim Northover2014-02-251-4/+4
| | | | llvm-svn: 202143
* ARM NEON: add _f16 support to a couple of vector-shuffling intrinsics.Tim Northover2014-02-251-0/+24
| | | | llvm-svn: 202137
* Add support for poly16 vtst and vtstqAmaury de la Vieuville2013-09-181-0/+12
| | | | | | | vtst and vtstq currently support poly8 types, but they should also work on poly16. llvm-svn: 190925
* ARM: Update testcases for improved codegen.Jim Grosbach2013-09-031-3/+3
| | | | | | From llvm r189841. llvm-svn: 189842
* Revert "Revert r184787: "Added arm_neon intrinsic tests.""Michael Gottesman2013-06-271-0/+11624
| | | | | | | | | | This reverts commit r184817. The failure Chandler was seeing was most likely the bug that Bob Wilson fixed in r184870 (which was a bug caught by these tests). To be safe, I just checked again on x86-64 mac os x/linux that this test passed (which it did). llvm-svn: 185110
* Revert r184787: "Added arm_neon intrinsic tests."Chandler Carruth2013-06-251-11624/+0
| | | | | | | This test doesn't actually pass when run with llvm-lit for me or in a bot that actually always tries to run it. llvm-svn: 184817
* Added arm_neon intrinsic tests.Michael Gottesman2013-06-241-0/+11624
This is a large test and thus it will only run if you pass in --param run_long_tests=trueto LIT. This is intended so that this test can run on buildbots and not when one runs make check. llvm-svn: 184787
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