This patch makes the NEON intrinsics vget_lane_f16, vgetq_lane_f16,

vset_lane_f16 and vsetq_lane_f16 available in AArch32.

Differential Revision: http://reviews.llvm.org/D10388

llvm-svn: 239610

1 files changed, 24 insertions, 0 deletions

diff --git a/clang/test/CodeGen/arm_neon_intrinsics.c b/clang/test/CodeGen/arm_neon_intrinsics.c
index 756e3b43fc5..d92c32c476a 100644
--- a/clang/test/CodeGen/arm_neon_intrinsics.c
+++ b/clang/test/CodeGen/arm_neon_intrinsics.c
@@ -2399,6 +2399,12 @@ float32_t test_vget_lane_f32(float32x2_t a) {
   return vget_lane_f32(a, 1);
 }
 
+// CHECK-LABEL: test_vget_lane_f16
+// CHECK: vmov 
+float32_t test_vget_lane_f16(float16x4_t a) {
+  return vget_lane_f16(a, 1);
+}
+
 // CHECK-LABEL: test_vgetq_lane_u8
 // CHECK: vmov 
 uint8_t test_vgetq_lane_u8(uint8x16_t a) {
@@ -2453,6 +2459,12 @@ float32_t test_vgetq_lane_f32(float32x4_t a) {
   return vgetq_lane_f32(a, 3);
 }
 
+// CHECK-LABEL: test_vgetq_lane_f16
+// CHECK: vmov 
+float32_t test_vgetq_lane_f16(float16x8_t a) {
+  return vgetq_lane_f16(a, 3);
+}
+
 // CHECK-LABEL: test_vget_lane_s64
 // The optimizer is able to remove all moves now.
 int64_t test_vget_lane_s64(int64x1_t a) {
@@ -9157,6 +9169,12 @@ float32x2_t test_vset_lane_f32(float32_t a, float32x2_t b) {
   return vset_lane_f32(a, b, 1);
 }
 
+// CHECK-LABEL: test_vset_lane_f16
+// CHECK: mov 
+float16x4_t test_vset_lane_f16(float16_t *a, float16x4_t b) {
+  return vset_lane_f16(*a, b, 1);
+}
+
 // CHECK-LABEL: test_vsetq_lane_u8
 // CHECK: vmov 
 uint8x16_t test_vsetq_lane_u8(uint8_t a, uint8x16_t b) {
@@ -9211,6 +9229,12 @@ float32x4_t test_vsetq_lane_f32(float32_t a, float32x4_t b) {
   return vsetq_lane_f32(a, b, 3);
 }
 
+// CHECK-LABEL: test_vsetq_lane_f16
+// CHECK: vmov 
+float16x8_t test_vsetq_lane_f16(float16_t *a, float16x8_t b) {
+  return vsetq_lane_f16(*a, b, 3);
+}
+
 // CHECK-LABEL: test_vset_lane_s64
 // The optimizer is able to get rid of all moves now.
 int64x1_t test_vset_lane_s64(int64_t a, int64x1_t b) {