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path: root/clang/lib/Basic/Targets/X86.cpp
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* [X86] Disable CLWB in Cannon LakeCraig Topper2018-02-211-1/+2
* [X86] Add 'sahf' CPU feature to frontendDimitry Andric2018-02-171-0/+11
* Add X86 Support to ValidCPUList (enabling march notes)Erich Keane2018-02-081-2/+13
* [X86] Add 'rdrnd' feature to silvermont to match recent gcc bug fix.Craig Topper2018-01-261-1/+1
* [X86] Define __IBT__ when -mibt is specified.Craig Topper2018-01-261-0/+2
* Introduce the "retpoline" x86 mitigation technique for variant #2 of the spec...Chandler Carruth2018-01-221-0/+6
* [X86] Add rdpid command line option and intrinsics.Craig Topper2018-01-201-0/+7
* [X86] Put the code that defines __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 for the p...Craig Topper2018-01-201-2/+2
* [X86] Make -mavx512f imply -mfma and -mf16c in the frontend like it does in t...Craig Topper2018-01-111-1/+5
* Added Control Flow Protection FlagOren Ben Simhon2018-01-091-0/+20
* Implement Attribute Target MultiVersioningErich Keane2018-01-081-0/+58
* Revert r321504 "[X86] Don't accidentally enable PKU on cannon lake and icelak...Craig Topper2017-12-291-5/+2
* [X86] Don't accidentally enable PKU on cannon lake and icelake or CLWB on can...Craig Topper2017-12-271-2/+4
* [X86] Enable avx512vpopcntdq and clwb for icelake.Craig Topper2017-12-271-1/+2
* [x86][icelake][vbmi2]Coby Tayree2017-12-271-7/+16
* [x86][icelake][vnni]Coby Tayree2017-12-271-2/+10
* [x86][icelake][bitalg]Coby Tayree2017-12-271-6/+14
* [x86][icelake][vpclmulqdq]Coby Tayree2017-12-271-1/+16
* [x86][icelake][gfni]Coby Tayree2017-12-271-1/+12
* [x86][icelake][vaes]Coby Tayree2017-12-271-1/+16
* [X86] Add 'prfchw' to the correct CPUs to match the backend.Craig Topper2017-12-221-0/+3
* Correct hasFeature/isValidFeatureName's handling of shstk/adx/mwaitxErich Keane2017-12-211-2/+7
* Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch Tracki...Oren Ben Simhon2017-11-261-0/+8
* [X86] Update CPUSupports code to reuse LLVM .def file [NFC]Erich Keane2017-11-221-31/+2
* [x86][inline-asm] allow recognition of MPX regs inside ms inline-asm blobCoby Tayree2017-11-211-0/+1
* [X86] Remove 'mm3now' from isValidFeatureName.Craig Topper2017-11-211-2/+0
* [X86] Add icelake CPU support for -march.Craig Topper2017-11-191-0/+4
* [X86] Set __corei7__ preprocessor defines for skylake server and cannonlake.Craig Topper2017-11-191-5/+2
* Split x86 "Processor" info into its own def file. [NFC]Erich Keane2017-11-151-109/+7
* Simplify CpuIs code to use include from LLVMErich Keane2017-11-151-30/+6
* [X86] Add 3dnow and 3dnowa to the list of valid target featuresMartin Storsjo2017-11-061-0/+2
* [X86] Define i586 and pentium preprocessor defines for -march=lakemont to mat...Craig Topper2017-11-011-0/+2
* Filter out invalid 'target' items from being passed to LLVMErich Keane2017-10-271-0/+1
* Remove x86,x86_32/64 from isValidFeatureNameErich Keane2017-10-271-3/+0
* [X86] Add 'sse4' to X86TargetInfo::isValidFeatureNameCraig Topper2017-10-271-0/+1
* [X86] Make -march=i686 an alias of -march=pentiumproCraig Topper2017-10-261-13/+3
* [X86] Add avx512vpopcntdq to Knights MillCraig Topper2017-10-251-0/+2
* Pull X86 "CPUKind" checking into .cpp file. [NFC]Erich Keane2017-10-231-0/+72
* [X86] Add skeleton support for knm cpuCraig Topper2017-10-131-0/+5
* [X86] Add support for 'amdfam17h' to __builtin_cpu_is to match gcc.Craig Topper2017-10-111-0/+1
* [Clang] Adding missing feature to goldmontMichael Zuckerman2017-09-251-0/+1
* [X86] Move even more of our CPU to feature mapping switch to use fallthroughsCraig Topper2017-09-171-44/+40
* [X86] Remove unnecessary extra encodings from the CPU name enum in clangCraig Topper2017-09-161-52/+14
* [Clang][x86][Inline Asm] support for GCC style inline asm - Y<x> constraintsCoby Tayree2017-08-241-16/+30
* [X86] Implement __builtin_cpu_isCraig Topper2017-08-101-0/+38
* [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.Craig Topper2017-08-081-0/+2
* [x86][inline-asm]Allow a pack of Control Debug to be properly pickedCoby Tayree2017-08-011-0/+1
* [x86][inline-asm]Allow a pack of Control Regs to be properly pickedCoby Tayree2017-07-301-0/+1
* Break up Targets.cpp into a header/impl pair per target type[NFCI]Erich Keane2017-07-211-0/+1577
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