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* [PowerPC] Treat 'Z' inline asm constraint as a true memory constraintNemanja Ivanovic2020-06-221-1/+2
| | | | | | | | | | | | We currently emit incorrect codegen for this constraint because we set it as a constraint that allows registers. This will cause the value to be copied to the stack and that address to be passed as the address. This is not what we want. Fixes: https://bugs.llvm.org/show_bug.cgi?id=42762 Differential revision: https://reviews.llvm.org/D77542 (cherry picked from commit aede24ecaa08db806fb173faf2de9cff95df8cee)
* [PowerPC]: Add powerpcspe target triple subarch componentJustin Hibbits2020-01-081-2/+1
| | | | | | | | | | Summary: This allows the use of '-target powerpcspe-unknown-linux-gnu' or 'powerpcspe-unknown-freebsd' to be used, instead of '-target powerpc-unknown-linux-gnu -mspe'. Reviewed By: dim Differential Revision: https://reviews.llvm.org/D72014
* [PowerPC][Triple] Use elfv2 on freebsd>=13 and linux-muslFangrui Song2020-01-071-1/+1
| | | | | | | | | | | | | | | | | | | Summary: Every powerpc64le platform uses elfv2. For powerpc64, the environments "elfv1" and "elfv2" were added for FreeBSD ELFv1->ELFv2 migration in D61950. FreeBSD developers have decided to use OS versions to select ABI, and no one is relying on the environments. Also use elfv2 on powerpc64-linux-musl. Users can always use -mabi=elfv1 and -mabi=elfv2 to override the default ABI. Reviewed By: adalava Differential Revision: https://reviews.llvm.org/D72352
* [PowerPC] Add new Future CPU for PowerPCStefan Pintilie2019-11-211-3/+11
| | | | | | | | | | | This patch will add -mcpu=future into clang for PowerPC. A CPU type is required for work that may possibly be enabled for some future Power CPU. The CPU type future will serve that purpose. This patch introduces no new functionality. It is an incremental patch on top of which Power PC work for some future CPU can be done. Differential Revision: https://reviews.llvm.org/D70262
* Add 8548 CPU definition and attributesJustin Hibbits2019-11-121-1/+3
| | | | | | | | 8548 CPU is GCC's name for the e500v2, so accept this in clang. The e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well, as GCC does. Differential Revision: https://reviews.llvm.org/D67787
* Add -m(no)-spe to clangJustin Hibbits2019-09-051-0/+1
| | | | | | | | | | | | | | Summary: r337347 added support for the Signal Processing Engine (SPE) to LLVM. This follows that up with the clang side. This adds -mspe and -mno-spe, to match GCC. Subscribers: nemanjai, kbarton, cfe-commits Differential Revision: https://reviews.llvm.org/D49754 llvm-svn: 371066
* [ItaniumMangle] Refactor long double/__float128 mangling and fix the mangled ↵Fangrui Song2019-07-091-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | code In gcc PowerPC, long double has 3 mangling schemes: -mlong-double-64: `e` -mlong-double-128 -mabi=ibmlongdouble: `g` -mlong-double-128 -mabi=ieeelongdouble: `u9__ieee128` (gcc <= 8.1: `U10__float128`) The current useFloat128ManglingForLongDouble() bisection is not suitable when we support -mlong-double-128 in clang (D64277). Replace useFloat128ManglingForLongDouble() with getLongDoubleMangling() and getFloat128Mangling() to allow 3 mangling schemes. I also deleted the `getTriple().isOSBinFormatELF()` check (the Darwin support has gone: https://reviews.llvm.org/D50988). For x86, change the mangled code of __float128 from `U10__float128` to `g`. `U10__float128` was wrongly copied from PowerPC. The test will be added to `test/CodeGen/x86-long-double.cpp` in D64277. Reviewed By: erichkeane Differential Revision: https://reviews.llvm.org/D64276 llvm-svn: 365480
* [X86][PPC] Support -mlong-double-64Fangrui Song2019-07-091-20/+7
| | | | | | | | | | | | | | | | | | | | | | | | -mlong-double-64 is supported on some ports of gcc (i386, x86_64, and ppc{32,64}). On many other targets, there will be an error: error: unrecognized command line option '-mlong-double-64' This patch makes the driver option -mlong-double-64 available for x86 and ppc. The CC1 option -mlong-double-64 is available on all targets for users to test on unsupported targets. LongDoubleSize is added as a VALUE_LANGOPT so that the option can be shared with -mlong-double-128 when we support it in clang. Also, make powerpc*-linux-musl default to use 64-bit long double. It is currently the only supported ABI on musl and is also how people configure powerpc*-linux-musl-gcc. Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D64067 llvm-svn: 365412
* [PowerPC] Support constraint code "ww"Fangrui Song2019-07-041-1/+2
| | | | | | | | | | | | | Summary: "ww" and "ws" are both constraint codes for VSX vector registers that hold scalar double data. "ww" is preferred for float while "ws" is preferred for double. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D64119 llvm-svn: 365106
* [PPC64] Fix PPC64TargetInfo ABI on clang side after D61950Fangrui Song2019-05-221-1/+2
| | | | llvm-svn: 361365
* [PPC64] Fix PPC64TargetInfo after D61950Fangrui Song2019-05-221-0/+1
| | | | llvm-svn: 361363
* [PPC64] Parse -elfv1 -elfv2 when specified on target tripleFangrui Song2019-05-221-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: For big-endian powerpc64, the default ABI is ELFv1. OpenPower ABI ELFv2 is supported when -mabi=elfv2 is specified. FreeBSD support for PowerPC64 ELFv2 ABI with LLVM is in progress[1]. This patch adds an alternative way to specify ELFv2 ABI on target triple [2]. The following results are expected: ELFv1 when using: -target powerpc64-unknown-freebsd12.0 -target powerpc64-unknown-freebsd12.0 -mabi=elfv1 -target powerpc64-unknown-freebsd12.0-elfv1 ELFv2 when using: -target powerpc64-unknown-freebsd12.0 -mabi=elfv2 -target powerpc64-unknown-freebsd12.0-elfv2 [1] https://wiki.freebsd.org/powerpc/llvm-elfv2 [2] https://clang.llvm.org/docs/CrossCompilation.html Patch by Alfredo Dal'Ava Júnior! Differential Revision: https://reviews.llvm.org/D61950 llvm-svn: 361355
* Fix Wimplicit-fallthrough warning introduced in rL357466. NFCI.Simon Pilgrim2019-04-021-0/+1
| | | | llvm-svn: 357467
* [PowerPC] Fix issue with inline asm - soft float modeStrahinja Petrovic2019-04-021-1/+9
| | | | | | | | | This patch prevents floating point register constraints in soft float mode. Differential Revision: https://reviews.llvm.org/D59310 llvm-svn: 357466
* Reland the rest of "Add AIX Target Info"Jason Liu2019-03-141-0/+29
| | | | | | | | | llvm-svn 356197 relanded previously failing test case max_align.c. This commit will reland the rest of llvm-svn 356060 commit. Differential Revision: https://reviews.llvm.org/D59048 llvm-svn: 356208
* Revert "Add AIX Target Info"Jason Liu2019-03-131-29/+0
| | | | | | | | | This reverts commit 4e192d0e1e72ce32fabf1bccc06ac31ab5385e78. The newly added test case max_align.c do not work on all platforms. original llvm-svn: 356060 llvm-svn: 356070
* Add AIX Target InfoJason Liu2019-03-131-0/+29
| | | | | | | | | | | | | | | | | | Summary: A first pass over platform-specific properties of the C API/ABI on AIX for both 32-bit and 64-bit modes. This is a continuation of D18360 by Andrew Paprocki and further work by Wu Zhao. Patch by Andus Yu Reviewers: apaprocki, chandlerc, hubert.reinterpretcast, jasonliu, xingxue, sfertile Reviewed by: hubert.reinterpretcast, apaprocki, sfertile Differential Revision: https://reviews.llvm.org/D59048 llvm-svn: 356060
* [PowerPC] Stop defining _ARCH_PWR6X on POWER7 and upHubert Tong2019-02-131-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The predefined macro `_ARCH_PWR6X` is associated with GCC's `-mcpu=power6x` option, which enables generation of P6 "raw mode" instructions such as `mftgpr`. Later POWER processors build upon the "architected mode", not the raw one. `_ARCH_PWR6X` should not be defined for these later processors. Fixes PR#40236. Reviewers: echristo, hfinkel, kbarton, nemanjai, wschmidt Reviewed By: hfinkel Subscribers: jsji, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D58128 llvm-svn: 353975
* long double is double on OpenBSD/NetBSD/PPC.Brad Smith2019-02-111-1/+7
| | | | | | Patch by George Koehler. llvm-svn: 353656
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* Replace getOS() == llvm::Triple::*BSD with isOS*BSD() [NFCI]Michal Gorny2018-12-201-1/+1
| | | | | | | | | | | | Replace multiple comparisons of getOS() value with FreeBSD, NetBSD, OpenBSD and DragonFly with matching isOS*BSD() methods. This should improve the consistency of coding style without changing the behavior. Direct getOS() comparisons were left whenever used in switch or switch- like context. Differential Revision: https://reviews.llvm.org/D55916 llvm-svn: 349752
* [PowerPC] VSX register support for inline assemblyKang Zhang2018-12-071-0/+2
| | | | | | | | | | | | Summary: The patch is to add the VSX register support for inline assembly. After this patch, we can use VSX register in inline assembly clobber list without error. Reviewed By: jsji, nemanjai Differential Revision: https://reviews.llvm.org/D55192 llvm-svn: 348572
* [Clang][PowerPC] Support constraint 'wi' in asmLi Jia He2018-11-011-0/+1
| | | | | | | | | | From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D53265 llvm-svn: 345809
* By popular demand, switch in64_t on NetBSD/AArch64 and NetBSD/PowerPC64Joerg Sonnenberger2018-07-171-4/+0
| | | | | | to long for consistency with other 64bit platforms. llvm-svn: 337271
* [Basic] Fix -Wreorder warningBenjamin Kramer2018-06-131-15/+12
| | | | | | Just use field initializers that don't suffer from this problem llvm-svn: 334619
* [PowerPC] The __float128 type should only be available on Power9Stefan Pintilie2018-06-131-23/+81
| | | | | | | | | | | | Diasble the use of the type __float128 for PPC machines older than Power9. The use of -mfloat128 for PPC machine older than Power9 will result in an error. Differential Revision: https://reviews.llvm.org/D48088 llvm-svn: 334613
* Support Swift calling convention for PPC64 targetsBob Wilson2018-05-251-0/+9
| | | | | | | This adds basic support for the Swift calling convention with PPC64 targets. Patch provided by Atul Sowani in bug report #37223 llvm-svn: 333316
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-091-1/+1
| | | | | | | | | | | | | | | | | | | This is similar to the LLVM change https://reviews.llvm.org/D46290. We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\@brief'); do perl -pi -e 's/\@brief //g' $i & done for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46320 llvm-svn: 331834
* Add Rest of Targets Support to ValidCPUList (enabling march notes)Erich Keane2018-02-081-0/+1
| | | | | | | | | | | A followup to: https://reviews.llvm.org/D42978 Most of the rest of the Targets were pretty rote, so this patch knocks them all out at once. Differential Revision: https://reviews.llvm.org/D43057 llvm-svn: 324676
* Break up Targets.cpp into a header/impl pair per target type[NFCI]Erich Keane2017-07-211-0/+368
Targets.cpp is getting unwieldy, and even minor changes cause the entire thing to cause recompilation for everyone. This patch bites the bullet and breaks it up into a number of files. I tended to keep function definitions in the class declaration unless it caused additional includes to be necessary. In those cases, I pulled it over into the .cpp file. Content is copy/paste for the most part, besides includes/format/etc. Differential Revision: https://reviews.llvm.org/D35701 llvm-svn: 308791
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