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path: root/clang/lib/Basic/Targets/AMDGPU.cpp
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* Add support for the MS qualifiers __ptr32, __ptr64, __sptr, __uptr.Amy Huang2019-12-181-2/+9
| | | | | | | | | | | | | | | | | | | | Summary: This adds parsing of the qualifiers __ptr32, __ptr64, __sptr, and __uptr and lowers them to the corresponding address space pointer for 32-bit and 64-bit pointers. (32/64-bit pointers added in https://reviews.llvm.org/D69639) A large part of this patch is making these pointers ignore the address space when doing things like overloading and casting. https://bugs.llvm.org/show_bug.cgi?id=42359 Reviewers: rnk, rsmith Subscribers: jholewinski, jvesely, nhaehnle, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D71039
* Prune include of DataLayout.h from include/clang/Basic/TargetInfo.h. NFCBjorn Pettersson2019-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Summary: Use a forward declaration of DataLayout instead of including DataLayout.h in clangs TargetInfo.h. This reduces include dependencies toward DataLayout.h (and other headers such as DerivedTypes.h, Type.h that is included by DataLayout.h). Needed to move implemantation of TargetInfo::resetDataLayout from TargetInfo.h to TargetInfo.cpp. Reviewers: rnk Reviewed By: rnk Subscribers: jvesely, nhaehnle, cfe-commits, llvm-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69262 llvm-svn: 375438
* AMDGPU: Add builtins for is_shared/is_privateMatt Arsenault2019-09-051-0/+2
| | | | llvm-svn: 371010
* [AMDGPU] Do not assume a default GCN targetStanislav Mekhanoshin2019-08-141-4/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D66246 llvm-svn: 368917
* [AMDGPU] gfx908 clang targetStanislav Mekhanoshin2019-07-091-0/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D64430 llvm-svn: 365528
* AMDGPU: Fix target builtins for gfx10Matt Arsenault2019-06-221-0/+2
| | | | | | This wasn't setting some of the features from older generations. llvm-svn: 364123
* [AMDGPU] gfx1011/gfx1012 clang supportStanislav Mekhanoshin2019-06-141-0/+7
| | | | | | Differential Revision: https://reviews.llvm.org/D63308 llvm-svn: 363345
* [AMDGPU] gfx1010 clang targetStanislav Mekhanoshin2019-05-131-0/+8
| | | | | | Differential Revision: https://reviews.llvm.org/D61875 llvm-svn: 360634
* AMDGPU: Enable _Float16Yaxun Liu2019-04-301-0/+3
| | | | llvm-svn: 359594
* [AMDGPU] rename vi-insts into gfx8-instsStanislav Mekhanoshin2019-04-051-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D60293 llvm-svn: 357792
* [AMDGPU] Add the missing clang change of the experimental buffer fat pointerMichael Liao2019-03-181-1/+2
| | | | llvm-svn: 356385
* [AMDGPU] Split dot-insts featureStanislav Mekhanoshin2019-02-091-1/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D57972 llvm-svn: 353588
* Do not copy long double and 128-bit fp format from aux target for AMDGPUYaxun Liu2019-01-311-0/+11
| | | | | | | | | | | | | | | rC352620 caused regressions because it copied floating point format from aux target. floating point format decides whether extended long double is supported. It is x86_fp80 on x86 but IEEE double on amdgcn. Document usage of long doubel type in HIP programming guide https://github.com/ROCm-Developer-Tools/HIP/pull/890 Differential Revision: https://reviews.llvm.org/D57527 llvm-svn: 352801
* [HIP] Fix size_t for MSVC environmentYaxun Liu2019-01-301-0/+4
| | | | | | | | | | | In 64 bit MSVC environment size_t is defined as unsigned long long. In single source language like HIP, data layout should be consistent in device and host compilation, therefore copy data layout controlling fields from Aux target for AMDGPU target. Differential Revision: https://reviews.llvm.org/D56318 llvm-svn: 352620
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* [AMDGPU] Separate feature dot-instsStanislav Mekhanoshin2019-01-101-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D56525 llvm-svn: 350794
* Move CodeGenOptions from Frontend to BasicRichard Trieu2018-12-111-1/+1
| | | | | | Basic uses CodeGenOptions and should not depend on Frontend. llvm-svn: 348827
* AMDGPU: Handle gfx909 in AMDGPUTargetInfo::initFeatureMapKonstantin Zhuravlyov2018-10-241-0/+1
| | | | | | + add required tests llvm-svn: 345181
* AMDGPU: Move target code into TargetParserMatt Arsenault2018-08-211-50/+26
| | | | llvm-svn: 340292
* AMDGPU: Fix enabling denormals by default on pre-VI targetsMatt Arsenault2018-08-081-1/+2
| | | | | | | | Fast FMAF is not a sufficient condition to enable denormals. Before VI, enabling denormals caused F32 instructions to run at F64 speeds. llvm-svn: 339278
* AMDGPU: Add builtin for s_dcache_wbMatt Arsenault2018-08-071-0/+1
| | | | llvm-svn: 339110
* AMDGPU: Add builtin for s_dcache_inv_volMatt Arsenault2018-08-071-1/+3
| | | | llvm-svn: 339109
* AMDGPU: Add Vega12 and Vega20Matt Arsenault2018-04-301-0/+4
| | | | | | | | Changes by Matt Arsenault Konstantin Zhuravlyov llvm-svn: 331216
* [CUDA] Revert defining __CUDA_ARCH__ for amdgcn targetsYaxun Liu2018-04-091-5/+0
| | | | | | | | | | amdgcn targets only support HIP, which does not define __CUDA_ARCH__. this is a partial unroll of r329232 / D45277. Differential Revision: https://reviews.llvm.org/D45387 llvm-svn: 329584
* [CUDA] Add amdgpu sub archsYaxun Liu2018-04-041-0/+5
| | | | | | | | | Patch by Greg Rodgers. Revised and lit tests added by Yaxun Liu. Differential Revision: https://reviews.llvm.org/D45277 llvm-svn: 329232
* AMDGPU: Update datalayout for stack alignmentMatt Arsenault2018-03-271-2/+2
| | | | llvm-svn: 328657
* [AMDGPU] Clean up old address space mapping and fix constant address space valueYaxun Liu2018-03-051-68/+32
| | | | | | Differential Revision: https://reviews.llvm.org/D43911 llvm-svn: 326725
* AMDGPU: Define FP_FAST_FMA{F} macros for amdgcnKonstantin Zhuravlyov2018-02-271-55/+69
| | | | | | | | | | - Expand GK_*s (i.e. GFX6 -> GFX600, GFX601, etc.) - This allows us to choose features correctly in some cases (for example, fast fmaf is available on gfx600, but not gfx601) - Move HasFMAF, HasFP64, HasLDEXPF to GPUInfo tables - Add HasFastFMA, HasFastFMAF to GPUInfo tables - Add missing tests llvm-svn: 326254
* Reapply r325193Konstantin Zhuravlyov2018-02-151-22/+28
| | | | llvm-svn: 325203
* Revert r325193 as it breaks buildbotsKonstantin Zhuravlyov2018-02-151-28/+22
| | | | llvm-svn: 325200
* Add missing definition for class static after r325193.Richard Smith2018-02-151-1/+1
| | | | llvm-svn: 325195
* AMDGPU: Cleanup most of the macrosKonstantin Zhuravlyov2018-02-151-22/+28
| | | | | | | | | | | - Insert __AMD__ macro - Insert __AMDGPU__ macro - Insert __devicename__ macro - Add missing tests for arch macros Differential Revision: https://reviews.llvm.org/D36802 llvm-svn: 325193
* [AMDGPU] Change constant addr space to 4Yaxun Liu2018-02-131-9/+9
| | | | | | Differential Revision: https://reviews.llvm.org/D43171 llvm-svn: 325031
* AMDGPU: Update for datalayout changeMatt Arsenault2018-02-091-3/+3
| | | | llvm-svn: 324748
* Add Rest of Targets Support to ValidCPUList (enabling march notes)Erich Keane2018-02-081-62/+27
| | | | | | | | | | | A followup to: https://reviews.llvm.org/D42978 Most of the rest of the Targets were pretty rote, so this patch knocks them all out at once. Differential Revision: https://reviews.llvm.org/D43057 llvm-svn: 324676
* [AMDGPU] Switch to the new addr space mapping by defaultYaxun Liu2018-02-021-1/+1
| | | | | | | | This requires corresponding llvm change. Differential Revision: https://reviews.llvm.org/D40956 llvm-svn: 324102
* AMDGPU: Don't add fp64 feature to r600 subtargetsMatt Arsenault2017-12-051-1/+1
| | | | | | Should fix test after r319709 llvm-svn: 319735
* AMDGPU: Parse r600 CPU name early and expose FMAF capabilityJan Vesely2017-10-191-1/+7
| | | | | | | Improve amdgcn macro test Differential Revision: https://reviews.llvm.org/D38667 llvm-svn: 316181
* Convert clang::LangAS to a strongly typed enumAlexander Richardson2017-10-151-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Convert clang::LangAS to a strongly typed enum Currently both clang AST address spaces and target specific address spaces are represented as unsigned which can lead to subtle errors if the wrong type is passed. It is especially confusing in the CodeGen files as it is not possible to see what kind of address space should be passed to a function without looking at the implementation. I originally made this change for our LLVM fork for the CHERI architecture where we make extensive use of address spaces to differentiate between capabilities and pointers. When merging the upstream changes I usually run into some test failures or runtime crashes because the wrong kind of address space is passed to a function. By converting the LangAS enum to a C++11 we can catch these errors at compile time. Additionally, it is now obvious from the function signature which kind of address space it expects. I found the following errors while writing this patch: - ItaniumRecordLayoutBuilder::LayoutField was passing a clang AST address space to TargetInfo::getPointer{Width,Align}() - TypePrinter::printAttributedAfter() prints the numeric value of the clang AST address space instead of the target address space. However, this code is not used so I kept the current behaviour - initializeForBlockHeader() in CGBlocks.cpp was passing LangAS::opencl_generic to TargetInfo::getPointer{Width,Align}() - CodeGenFunction::EmitBlockLiteral() was passing a AST address space to TargetInfo::getPointerWidth() - CGOpenMPRuntimeNVPTX::translateParameter() passed a target address space to Qualifiers::addAddressSpace() - CGOpenMPRuntimeNVPTX::getParameterAddress() was using llvm::Type::getPointerTo() with a AST address space - clang_getAddressSpace() returns either a LangAS or a target address space. As this is exposed to C I have kept the current behaviour and added a comment stating that it is probably not correct. Other than this the patch should not cause any functional changes. Reviewers: yaxunl, pcc, bader Reviewed By: yaxunl, bader Subscribers: jlebar, jholewinski, nhaehnle, Anastasia, cfe-commits Differential Revision: https://reviews.llvm.org/D38816 llvm-svn: 315871
* [OpenCL] Add LangAS::opencl_private to represent private address space in ASTYaxun Liu2017-10-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Currently Clang uses default address space (0) to represent private address space for OpenCL in AST. There are two issues with this: Multiple address spaces including private address space cannot be diagnosed. There is no mangling for default address space. For example, if private int* is emitted as i32 addrspace(5)* in IR. It is supposed to be mangled as PUAS5i but it is mangled as Pi instead. This patch attempts to represent OpenCL private address space explicitly in AST. It adds a new enum LangAS::opencl_private and adds it to the variable types which are implicitly private: automatic variables without address space qualifier function parameter pointee type without address space qualifier (OpenCL 1.2 and below) Differential Revision: https://reviews.llvm.org/D35082 llvm-svn: 315668
* AMDGPU: add missing amdgcn processors and testsKonstantin Zhuravlyov2017-08-181-10/+15
| | | | | | | | | | | | - gfx600 - gfx601 - gfx703 - gfx902 - gfx903 Differential Revision: https://reviews.llvm.org/D36771 llvm-svn: 311141
* Add OpenCL 2.0 atomic builtin functions as Clang builtinYaxun Liu2017-08-041-0/+2
| | | | | | | | | | | | | | | | | | | | | OpenCL 2.0 atomic builtin functions have a scope argument which is ideally represented as synchronization scope argument in LLVM atomic instructions. Clang supports translating Clang atomic builtin functions to LLVM atomic instructions. However it currently does not support synchronization scope of LLVM atomic instructions. Without this, users have to use LLVM assembly code to implement OpenCL atomic builtin functions. This patch adds OpenCL 2.0 atomic builtin functions as Clang builtin functions, which supports generating LLVM atomic instructions with synchronization scope operand. Currently only constant memory scope argument is supported. Support of non-constant memory scope argument will be added later. Differential Revision: https://reviews.llvm.org/D28691 llvm-svn: 310082
* Break up Targets.cpp into a header/impl pair per target type[NFCI]Erich Keane2017-07-211-0/+356
Targets.cpp is getting unwieldy, and even minor changes cause the entire thing to cause recompilation for everyone. This patch bites the bullet and breaks it up into a number of files. I tended to keep function definitions in the class declaration unless it caused additional includes to be necessary. In those cases, I pulled it over into the .cpp file. Content is copy/paste for the most part, besides includes/format/etc. Differential Revision: https://reviews.llvm.org/D35701 llvm-svn: 308791
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