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* [DWARFv5] Emit new unit header format.Paul Robinson2017-02-2815-23/+383
| | | | | | | | | Requesting DWARF v5 will now get you the new compile-unit and type-unit headers. llvm-dwarfdump will also recognize them. Differential Revision: http://reviews.llvm.org/D30206 llvm-svn: 296514
* AMDGPU: Add ds_nop to assemblerMatt Arsenault2017-02-282-1/+26
| | | | llvm-svn: 296513
* AMDGPU: Add definitions for ds_{read|write}_b{96|128}Matt Arsenault2017-02-282-4/+28
| | | | | | | | | It's not clear to me if this is always better than doing ds_write2_b64 This adds the constraint of a 128-bit register input instead of a pair of 64-bit. llvm-svn: 296512
* Minor refactoring. NFC.Rui Ueyama2017-02-281-4/+5
| | | | llvm-svn: 296511
* Use make<> instead of new (BAlloc). NFC.Rui Ueyama2017-02-283-9/+8
| | | | | | We converted them before, but there were a few remaining occurrences. llvm-svn: 296510
* De-template DefinedRegular.Rui Ueyama2017-02-2817-119/+107
| | | | | | Differential Revision: https://reviews.llvm.org/D30348 llvm-svn: 296508
* Make it obvious that st_value for common symbols has a different meaning.Rui Ueyama2017-02-281-5/+13
| | | | llvm-svn: 296507
* [AMDGPU] Add second pass of the schedulerStanislav Mekhanoshin2017-02-282-7/+126
| | | | | | | | | | | If during scheduling we have identified that we cannot keep optimistic occupancy increase critical register pressure limit and try scheduling of the whole function again. In this case blocks with smaller pressure will have a chance for better scheduling. Differential Revision: https://reviews.llvm.org/D30442 llvm-svn: 296506
* Fix wrong TLS symbol values.Rui Ueyama2017-02-285-12/+4
| | | | | | | | | | I do not fully understand why we had these values in the tests, but the new value matches what ld.bfd and ld.gold set, so I guess that was just a mistake. Differential Revision: https://reviews.llvm.org/D30441 llvm-svn: 296505
* Fix a bug in r294611 w.r.t. Darwin Kernel debugging.Jim Ingham2017-02-284-0/+19
| | | | | | <rdar://problem/30735021> llvm-svn: 296504
* Revert "Add terminator to .eh_frame sections"Rafael Espindola2017-02-289-19/+10
| | | | | | | | | | | | | | This reverts commit r296378. I am pretty sure this is incorrect. In particular, for just .cfi_startproc nop .cfi_endproc We now add an extra 4 zeros that neither bfd nor gold add. llvm-svn: 296503
* [DAGCombiner] use dyn_cast values in foldSelectOfConstants(); NFCSanjay Patel2017-02-281-6/+8
| | | | llvm-svn: 296502
* Fix -Wcovered-switch-default warning.Zachary Turner2017-02-281-2/+0
| | | | llvm-svn: 296501
* [LCG] Fix EXPENSIVE_CHECKS typo. NFCFrancis Visoiu Mistrih2017-02-281-5/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D30434 llvm-svn: 296500
* clang-format: [Java] Fix bug in enum formatting.Daniel Jasper2017-02-282-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | Before: public enum VeryLongEnum { ENUM_WITH_MANY_PARAMETERS("aaaaaaaaaaaaaaaaaaaaaa", "bbbbbbbbbbbbbbbbbbbbbbbbbbb", "ccccccccccccccccccc") , SECOND_ENUM("a", "b", "c"); private VeryLongEnum(String a, String b, String c) {} } After: public enum VeryLongEnum { ENUM_WITH_MANY_PARAMETERS("aaaaaaaaaaaaaaaaaaaaaa", "bbbbbbbbbbbbbbbbbbbbbbbbbbb", "ccccccccccccccccccc") , SECOND_ENUM("a", "b", "c"); private VeryLongEnum(String a, String b, String c) {} } llvm-svn: 296499
* Add function importing info from samplepgo profile to the module summary.Dehao Chen2017-02-2814-29/+139
| | | | | | | | | | | | | | Summary: For SamplePGO, the profile may contain cross-module inline stacks. As we need to make sure the profile annotation happens when all the hot inline stacks are expanded, we need to pass this info to the module importer so that it can import proper functions if necessary. This patch implemented this feature by emitting cross-module targets as part of function entry metadata. In the module-summary phase, the metadata is used to build call edges that points to functions need to be imported. Reviewers: mehdi_amini, tejohnson Reviewed By: tejohnson Subscribers: davidxl, llvm-commits Differential Revision: https://reviews.llvm.org/D30053 llvm-svn: 296498
* Workaround MSVC bug when using TrailingObjects from a template.James Y Knight2017-02-282-0/+28
| | | | | | | | | | | | | MSVC appears to be getting confused as to whether OverloadToken is supposed to be public or not. This was discovered by code in Swift, and has been reported to microsoft by hughbe: https://connect.microsoft.com/VisualStudio/feedback/details/3116517 Differential Revision: https://reviews.llvm.org/D29880 llvm-svn: 296497
* [x86] add alternate IR tests for select of constants; NFCSanjay Patel2017-02-281-0/+68
| | | | llvm-svn: 296496
* Fix incorrect logic in StackFrame::Disassemble.Zachary Turner2017-02-281-11/+13
| | | | | | This had broken as the result of some previous cleanup. llvm-svn: 296495
* [PDB] Add BinaryStreamError.Zachary Turner2017-02-2813-80/+184
| | | | | | | This migrates the stream code away from MSFError to using its own custom Error class. llvm-svn: 296494
* Set default CPU for OpenBSD/arm to Cortex-A8Brad Smith2017-02-282-0/+5
| | | | llvm-svn: 296493
* Fix issue with test case. Make test x86_64 specificDavid Bozier2017-02-281-2/+2
| | | | llvm-svn: 296492
* [AMDGPU] New method to estimate register pressureStanislav Mekhanoshin2017-02-282-21/+150
| | | | | | | | | | | | | | | | | | | | | | | | This change introduces new method to estimate register pressure in GCNScheduler. Standard RPTracker gives huge error due to the following reasons: 1. It does not account for live-ins or live-outs if value is not used in the region itself. That creates a huge error in a very common case if there are a lot of live-thu registers. 2. It does not properly count subregs. 3. It assumes a register used as an input operand can be reused as an output. This is not always possible by itself, this is not what RA will finally do in many cases for various reasons not limited to RA's inability to do so, and this is not so if the value is actually a live-thu. In addition we can now see clear separation between live-in pressure which we cannot change with the scheduling and tentative pressure which we can change. Differential Revision: https://reviews.llvm.org/D30439 llvm-svn: 296491
* Migrate all of aarch64-linux-gnu to \01_mcount instead of just when passing ↵Eric Christopher2017-02-282-4/+6
| | | | | | | | along gnueabi as this matches both gcc and what the kernel expects. More of PR27311 llvm-svn: 296490
* [AMDGPU] Change amd_kernel_code_t's minor version to 1Konstantin Zhuravlyov2017-02-283-3/+3
| | | | | | | | - We do emit amd_kernel_code_t v1.1 Differential Revision: https://reviews.llvm.org/D30433 llvm-svn: 296489
* Strip debug info when inlining into a nodebug function.Adrian Prantl2017-02-283-15/+70
| | | | | | | | | | | | | The LLVM backend cannot produce any debug info for an llvm::Function without a DISubprogram attachment. When inlining a debug-info-carrying function into a nodebug function, there is therefore no reason to keep any debug info intrinsic calls or debug locations on the instructions. This fixes a problem discovered in PR32042. rdar://problem/30679307 llvm-svn: 296488
* [llvm-cov] Error-out when an unsupported format is used (PR32087)Vedant Kumar2017-02-282-1/+10
| | | | llvm-svn: 296487
* [DAGISel] When checking if chain node is foldable, make sure the ↵Craig Topper2017-02-282-255/+83
| | | | | | | | intermediate nodes have a single use across all results not just the result that was used to reach the chain node. This recovers a test case that was severely broken by r296476, my making sure we don't create ADD/ADC that loads and stores when there is also a flag dependency. llvm-svn: 296486
* Driver: Update devtoolset usage for RHELTom Stellard2017-02-281-2/+1
| | | | | | | | | | | - remove path to dts-1.x (corresponds to gcc 4.7) - add path to dts-6 (corresponds to 6.x) Patch By: Maria Gottschalk Differential Revision: https://reviews.llvm.org/D29855 llvm-svn: 296485
* [AMDGPU] Fix read-undef flags when schedule is revertedStanislav Mekhanoshin2017-02-281-12/+15
| | | | | | | | | | | | | If two subregs of the same register are defined and we need to revert schedule changing def order, we will end up with both instructions having def,read-undef flags because adjustLaneLiveness() will only set this flag but will not remove it. Fix this by removing read-undef flags before calling adjustLaneLiveness. Differential Revision: https://reviews.llvm.org/D30428 llvm-svn: 296484
* [Stack Protection] Add diagnostic information for why stack protection was ↵David Bozier2017-02-284-35/+176
| | | | | | | | | | | | | | applied to a function Stack Smash Protection is not completely free, so in hot code, the overhead it causes can cause performance issues. By adding diagnostic information for which functions have SSP and why, a user can quickly determine what they can do to stop SSP being applied to a specific hot function. This change adds a remark that is reported by the stack protection code when an instruction or attribute is encountered that causes SSP to be applied. Patch by: James Henderson Differential Revision: https://reviews.llvm.org/D29023 llvm-svn: 296483
* [mips] Fix 64bit slt/sltu/nor with immediatesSimon Dardis2017-02-285-112/+369
| | | | | | | | | | Patch By: Alexander Richardson Reviewers: atanasyan, theraven, sdardis Differential Revision: https://reviews.llvm.org/D30330 llvm-svn: 296482
* [clang-tidy] Fix a false positive on modernize-use-nullptr check.Haojian Wu2017-02-282-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The false positive happens on two neighbour CXXDefaultArgExpr AST nodes. like below: ``` CXXFunctionalCastExpr 0x85c9670 <col:7, col:23> 'struct ZZ' functional cast to struct ZZ <ConstructorConversion> `-CXXConstructExpr 0x85c9518 <col:7, col:23> 'struct ZZ' 'void (uint64, const uint64 *)' |-CallExpr 0x85a0a90 <col:10, col:22> 'uint64':'unsigned long long' | |-ImplicitCastExpr 0x85a0a78 <col:10> 'uint64 (*)(uint64)' <FunctionToPointerDecay> | | `-DeclRefExpr 0x85a09f0 <col:10> 'uint64 (uint64)' lvalue Function 0x85a06a0 'Hash' 'uint64 (uint64)' | `-CXXDefaultArgExpr 0x85a0ac8 <<invalid sloc>> 'uint64':'unsigned long long' `-CXXDefaultArgExpr 0x85c94f8 <<invalid sloc>> 'const uint64 *' ``` For each particular CXXDefaultArgExpr node, we need to reset FirstSubExpr, otherwise FirstSubExpr will refer to an incorrect expr. Reviewers: alexfh Reviewed By: alexfh Subscribers: JDevlieghere, cfe-commits Differential Revision: https://reviews.llvm.org/D30412 llvm-svn: 296479
* Revert r296474 - [globalisel] Change LLT constructor string into an LLT ↵Daniel Sanders2017-02-2810-290/+246
| | | | | | | | subclass that knows how to generate it. There's a circular dependency that's only revealed when LLVM_ENABLE_MODULES=1. llvm-svn: 296478
* [Sema] Detect more array index out of bounds when C++ overloaded operators ↵Daniel Marjamaki2017-02-282-1/+23
| | | | | | | | are used Differential Revision: https://reviews.llvm.org/D30192 llvm-svn: 296477
* In visitSTORE, always use FindBetterChain, rather than only when UseAA is ↵Nirav Dave2017-02-2874-2547/+2500
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enabled. Recommiting after fixup of 32-bit aliasing sign offset bug in DAGCombiner. * Simplify Consecutive Merge Store Candidate Search Now that address aliasing is much less conservative, push through simplified store merging search and chain alias analysis which only checks for parallel stores through the chain subgraph. This is cleaner as the separation of non-interfering loads/stores from the store-merging logic. When merging stores search up the chain through a single load, and finds all possible stores by looking down from through a load and a TokenFactor to all stores visited. This improves the quality of the output SelectionDAG and the output Codegen (save perhaps for some ARM cases where we correctly constructs wider loads, but then promotes them to float operations which appear but requires more expensive constant generation). Some minor peephole optimizations to deal with improved SubDAG shapes (listed below) Additional Minor Changes: 1. Finishes removing unused AliasLoad code 2. Unifies the chain aggregation in the merged stores across code paths 3. Re-add the Store node to the worklist after calling SimplifyDemandedBits. 4. Increase GatherAllAliasesMaxDepth from 6 to 18. That number is arbitrary, but seems sufficient to not cause regressions in tests. 5. Remove Chain dependencies of Memory operations on CopyfromReg nodes as these are captured by data dependence 6. Forward loads-store values through tokenfactors containing {CopyToReg,CopyFromReg} Values. 7. Peephole to convert buildvector of extract_vector_elt to extract_subvector if possible (see CodeGen/AArch64/store-merge.ll) 8. Store merging for the ARM target is restricted to 32-bit as some in some contexts invalid 64-bit operations are being generated. This can be removed once appropriate checks are added. This finishes the change Matt Arsenault started in r246307 and jyknight's original patch. Many tests required some changes as memory operations are now reorderable, improving load-store forwarding. One test in particular is worth noting: CodeGen/PowerPC/ppc64-align-long-double.ll - Improved load-store forwarding converts a load-store pair into a parallel store and a memory-realized bitcast of the same value. However, because we lose the sharing of the explicit and implicit store values we must create another local store. A similar transformation happens before SelectionDAG as well. Reviewers: arsenm, hfinkel, tstellarAMD, jyknight, nhaehnle llvm-svn: 296476
* [ELF] - Do not set flags for CopyRelSection. NFC.George Rimar2017-02-281-4/+1
| | | | | | | It does not make sense. Them added either to Out::BssRelRo or Out::Bss, which are always RW. llvm-svn: 296475
* [globalisel] Change LLT constructor string into an LLT subclass that knows ↵Daniel Sanders2017-02-2810-246/+290
| | | | | | | | | | | | | | | | | | how to generate it. Summary: This will allow future patches to inspect the details of the LLT. The implementation is now split between the Support and CodeGen libraries to allow TableGen to use this class without introducing layering concerns. Thanks to Ahmed Bougacha for finding a reasonable way to avoid the layering issue and providing the version of this patch without that problem. Reviewers: t.p.northover, qcolombet, rovka, aditya_nandakumar, ab, javed.absar Subscribers: arsenm, nhaehnle, mgorny, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30046 llvm-svn: 296474
* [ARM] GlobalISel: Lower i32 and fp call parameters on the stackDiana Picus2017-02-282-16/+77
| | | | | | | | | | | | Lower i32, float and double parameters that need to live on the stack. This boils down to creating some G_GEPs starting from the stack pointer and storing the values there. During the process we also keep track of the stack size and use the final value in the ADJCALLSTACKDOWN/UP instructions. We currently assert for smaller types, since they usually require extensions. They will be handled in a separate patch. llvm-svn: 296473
* Misspelled checker description (argument comment)Alexander Kornienko2017-02-281-2/+3
| | | | | | | | | | | | | | | | Reviewers: alexfh Reviewed By: alexfh Subscribers: Eugene.Zelenko Tags: #clang-tools-extra Patch by Peter Szecsi! Differential Revision: https://reviews.llvm.org/D24137 llvm-svn: 296472
* [ARM] GlobalISel: Select 32-bit G_CONSTANTDiana Picus2017-02-282-0/+30
| | | | | | Put it into a register by means of a MOVi. llvm-svn: 296471
* Switch SBWatchpoint to use a weak_ptr to the underlying objectPavel Labath2017-02-283-15/+14
| | | | llvm-svn: 296470
* [ARM] GlobalISel: Add mapping for G_CONSTANTDiana Picus2017-02-282-0/+19
| | | | | | | Like G_FRAME_INDEX, G_CONSTANT has one register operand and one non-register operand. llvm-svn: 296469
* [ARM] GlobalISel: Legalize 32-bit constantsDiana Picus2017-02-282-0/+22
| | | | llvm-svn: 296468
* Blacklist arbitrary @\\w+ JSDoc tags from wrapping.Martin Probst2017-02-282-2/+26
| | | | | | | | | | | | | | | | | | | | Summary: Also limits the blacklisting to only apply when the tag is actually followed by a parameter in curly braces. /** @mods {long.type.must.not.wrap} */ vs /** @const this is a long description that may wrap. */ Reviewers: djasper Subscribers: klimek, krasimir, cfe-commits Differential Revision: https://reviews.llvm.org/D30452 llvm-svn: 296467
* [ELF] - Remove ElfSym::EhdrStart member. NFC.George Rimar2017-02-282-6/+1
| | | | | | We do not use it later, so don't have to store. llvm-svn: 296466
* [Assembler] Add test for !srcloc references in assembler diagsSanne Wouda2017-02-282-1/+42
| | | | | | | | | | | | | | | | | | | | | | | Summary: clang adds !srcloc metadata to inline assembly in LLVM bitcode generated for inline assembly in C. The value of this !srcloc is passed to the diagnostics handler if the inline assembly generates a diagnostic. clang is able to turn this cookie back to a location in the C source file. To test this functionality without a dependency, make llc print the !srcloc metadata if it is present. The added test uses this mechanism to test that the correct !srclocs are passed to the diag handler. Reviewers: rengolin, rnk, echristo, grosbach, mehdi_amini Reviewed By: mehdi_amini Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D30167 llvm-svn: 296465
* Reformat a blank line.NAKAMURA Takumi2017-02-281-1/+1
| | | | llvm-svn: 296464
* Revert r296442 (and r296443), "Allow externally dlopen-ed libraries to be ↵NAKAMURA Takumi2017-02-283-66/+14
| | | | | | | | registered as permanent libraries." It broke clang/test/Analysis/checker-plugins.c llvm-svn: 296463
* [ARM] GlobalISel: Select G_GEPDiana Picus2017-02-282-0/+30
| | | | | | At this point, G_GEP is just an add, so we treat it exactly like a G_ADD. llvm-svn: 296462
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