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* [WebAssembly] Small improvements in FixIrreducibleControlFlow (NFC)Heejin Ahn2019-03-191-24/+16
| | | | | | | | | | | | | | | | | Summary: - Make some class member methods const - Delete unnecessary includes - Use a simpler form of `BuildMI` Reviewers: kripken Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59454 llvm-svn: 356440
* [WebAssembly] Improve readability of irreducibility testsHeejin Ahn2019-03-192-53/+51
| | | | | | | | | | | | | | | | | Summary: This adds `preds` comment lines to BB names for readability, while also fixes some of existing incorrect comment lines. Also deletes a few unnecessary attributes. Autogenerated by `opt`. Reviewers: kripken Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59456 llvm-svn: 356439
* [WebAssembly] Rename methods according to instruction name changes (NFC)Heejin Ahn2019-03-191-7/+7
| | | | | | | | | | | | Reviewers: tlively, sbc100 Subscribers: dschuff, jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59469 llvm-svn: 356438
* [WebAssembly] Add immarg attribute to intrinsicsHeejin Ahn2019-03-192-5/+5
| | | | | | | | | | | | | | | | Summary: After r355981, intrinsic arguments that are immediate values should be marked as `ImmArg`. Reviewers: dschuff, tlively Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59447 llvm-svn: 356437
* [WebAssembly] Change wasm.throw's first argument to an immediateHeejin Ahn2019-03-192-5/+5
| | | | | | | | | | | | | | | | Summary: `wasm.throw` builtin's first 'tag' argument should be an immediate index into the event section. Reviewers: dschuff, craig.topper Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59448 llvm-svn: 356436
* Mark 'front()' and 'back()' as noexcept for array/deque/string/string_view. ↵Marshall Clow2019-03-1912-45/+94
| | | | | | These are just rebranded 'operator[]', and should be noexcept like it is. llvm-svn: 356435
* [CodeGen] LLVM OpenMP Backend.Michael Kruse2019-03-1913-224/+1267
| | | | | | | | | | | | | | | | | | | | | The ParallelLoopGenerator class is changed such that GNU OpenMP specific code was removed, allowing to use it as super class in a template-pattern. Therefore, the code has been reorganized and one may not use the ParallelLoopGenerator directly anymore, instead specific implementations have to be provided. These implementations contain the library-specific code. As such, the "GOMP" (code completely taken from the existing backend) and "KMP" variant were created. For "check-polly" all tests that involved "GOMP": equivalents were added that test the new functionalities, like static scheduling and different chunk sizes. "docs/UsingPollyWithClang.rst" shows how the alternative backend may be used. Patch by Michael Halkenhäuser <michaelhalk@web.de> Differential Revision: https://reviews.llvm.org/D59100 llvm-svn: 356434
* Factor out repeated code parsing and concatenating header-names fromRichard Smith2019-03-199-205/+129
| | | | | | | | | | | tokens. We now actually form an angled_string_literal token for a header name by concatenation rather than just working out what its contents would be. This substantially simplifies downstream processing and is necessary for C++20 header unit imports. llvm-svn: 356433
* Don't apply the include depth limit until we actually decide to enterRichard Smith2019-03-191-7/+7
| | | | | | | | | the file. NFC unless a skipped #include is found at the final permitted #include level. llvm-svn: 356432
* [WebAssembly] Lower SIMD nnan setcc nodesThomas Lively2019-03-192-10/+644
| | | | | | | | | | | | | | | | | | Summary: Adds patterns to lower all the remaining setcc modes: lt, gt, le, and ge. Fixes PR40912. Reviewers: aheejin, sbc100, dschuff Reviewed By: dschuff Subscribers: jgravelle-google, hiraditya, sunfish, jdoerfert, llvm-commits, srj Tags: #llvm Differential Revision: https://reviews.llvm.org/D59519 llvm-svn: 356431
* Minor renaming as suggested in review [NFC]Aaron Puchert2019-03-192-15/+16
| | | | | | See D59455. llvm-svn: 356430
* Remove unused try catch blocks from old debug testsEric Fiselier2019-03-191-26/+14
| | | | llvm-svn: 356429
* [ELF] Allow sh_entsize to be unrelated to sh_addralign and not a power of 2Fangrui Song2019-03-186-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This implements Rui Ueyama's idea in PR39044. I've checked that ld.bfd and gold do not have the power-of-2 requirement and do not require sh_entsize to be a multiple of sh_align. Now on the updated test merge-entsize.s, all the 3 linkers happily create .rodata that is not 3-byte aligned. This has a use case in Linux arch/x86/crypto/sha512-avx2-asm.S It uses sh_entsize of 640, which is not a power of 2. See https://github.com/ClangBuiltLinux/linux/issues/417 Reviewers: ruiu, espindola Reviewed By: ruiu Subscribers: nickdesaulniers, E5ten, emaste, arichardson, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59478 llvm-svn: 356428
* Thread safety analysis: Add note for unlock kind mismatchAaron Puchert2019-03-185-22/+24
| | | | | | | | | | | | | | | | | | Summary: Similar to D56967, we add the existing diag::note_locked_here to tell the user where we saw the locking that isn't matched correctly. Reviewers: aaron.ballman, delesley Reviewed By: aaron.ballman Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D59455 llvm-svn: 356427
* [asan] Disable -Wfortify-source in intentional OOB testsReid Kleckner2019-03-182-4/+4
| | | | | | Needed after r356397 llvm-svn: 356426
* [MS] Skip vbase construction in abstract class ctorsReid Kleckner2019-03-183-27/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As background, when constructing a complete object, virtual bases are constructed first. If an exception is thrown later in the ctor, those virtual bases are destroyed, so sema marks the relevant constructors and destructors of virtual bases as referenced. If necessary, they are emitted. However, an abstract class can never be used to construct a complete object. In the Itanium C++ ABI, this works out nicely, because we never end up emitting the "complete" constructor variant, only the "base" constructor variant, which can be called by constructors of derived classes. Clang's Sema::MarkBaseAndMemberDestructorsReferenced is aware of this optimization, and it does not mark ctors and dtors of virtual bases referenced when the constructor of an abstract class is emitted. In the Microsoft ABI, there are no complete/base variants, so before this change, the constructor of an abstract class could reference ctors and dtors of a virtual base without marking them referenced. This could lead to unresolved symbol errors at link time, as reported in PR41065. The fix is to implement the same optimization as Sema: If the class is abstract, don't bother initializing its virtual bases. The "is this class the most derived class" check in the constructor will never pass, and the virtual base constructor calls are always dead. Skip them. I think Richard noticed this missed optimization back in 2016 when he was implementing inheriting constructors. I wasn't able to find any bugs or email about it, though. Fixes PR41065 llvm-svn: 356425
* Revert "[ValueTracking][InstSimplify] Support min/max selects in ↵Nikita Popov2019-03-183-57/+17
| | | | | | | | | | computeConstantRange()" This reverts commit 106f0cdefb02afc3064268dc7a71419b409ed2f3. This change impacts the AMDGPU smed3.ll and umed3.ll codegen tests. llvm-svn: 356424
* [X86] Add gcc rotate intrinsics to ia32intrin.hCraig Topper2019-03-182-0/+180
| | | | | | | | | | | | | | | | This is another attempt at what Erich Keane tried to do in r355322. This adds rolb, rolw, rold, rolq and their ror equivalent as always_inline wrappers around __builtin_rotate* which will lower to funnel shift intrinsics in IR. Additionally, when _MSC_VER is not defined we will define _rotl, _lrotl, _rotr, _lrotr as macros to one of the always_inline intrinsics mentioned above. Making sure that _lrotl/_lrotr use either 32 or 64 bit based on the size of long. These need to be macros because we have builtins with the same name for MS compatibility, but _MSC_VER isn't always defined when those builtins are enabled. We also define _rotwl and _rotwr as macros aliasing to rolw/rorw just like gcc to complete the set. These don't need to be gated with _MSC_VER because these aren't MS builtins. I've added tests both for non-MS and -ms-extensions with and without _MSC_VER being defined. Differential Revision: https://reviews.llvm.org/D59346 llvm-svn: 356423
* [libFuzzer] document -len_controlKostya Serebryany2019-03-181-0/+4
| | | | llvm-svn: 356422
* Fix test failures after debug mode changesEric Fiselier2019-03-181-3/+3
| | | | llvm-svn: 356421
* [X86] Add coverage for 16-bit and 64-bit versions of bsf/bsr/bt/btc/btr/bts ↵Craig Topper2019-03-184-23/+240
| | | | | | in the assembly tests that are supposed to provide full coverage. Add coverage for cwtl/cltq/cwtd/cqto as well. llvm-svn: 356420
* [X86] Disable CQTO and CLTQ instructions in the assembly parser outside ↵Craig Topper2019-03-182-2/+8
| | | | | | 64-bit mode. llvm-svn: 356419
* [NFC][TSan][libdispatch] Fix test for dispatch_apply[_f]Julian Lettner2019-03-181-12/+18
| | | | | | | | | | | | | | | | * Array index out of bounds: 100 iterations, but size of array is 2. * Unmatched barrier_init (2) with barrier_wait (200) * Number of iterations must be smaller than the available parallelism for the queue, otherwise we deadlock (since every barrier_wait call blocks the thread). Scary: All of this worked reliably in gcd-apply.mm (for Darwin) Rievewed By: kubamracek Differential Revision: https://reviews.llvm.org/D59510 llvm-svn: 356418
* Remove exception throwing debug mode handler support.Eric Fiselier2019-03-1827-769/+910
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The reason libc++ implemented a throwing debug mode handler was for ease of testing. Specifically, I thought that if a debug violation aborted, we could only test one violation per file. This made it impossible to test debug mode. Which throwing behavior we could test more! However, the throwing approach didn't work either, since there are debug violations underneath noexcept functions. This lead to the introduction of `_NOEXCEPT_DEBUG`, which was only noexcept when debug mode was off. Having thought more and having grown wiser, `_NOEXCEPT_DEBUG` was a horrible decision. It was viral, it didn't cover all the cases it needed to, and it was observable to the user -- at worst changing the behavior of their program. This patch removes the throwing debug handler, and rewrites the debug tests using 'fork-ing' style death tests. Reviewers: mclow.lists, ldionne, thomasanderson Reviewed By: ldionne Subscribers: christof, arphaman, libcxx-commits, #libc Differential Revision: https://reviews.llvm.org/D59166 llvm-svn: 356417
* A target definition file that may work for Jason Molenda2019-03-181-0/+140
| | | | | | | | Aarch32 Cortex-M target processor debugging. <rdar://problem/48448564> llvm-svn: 356416
* [ValueTracking][InstSimplify] Support min/max selects in computeConstantRange()Nikita Popov2019-03-183-17/+57
| | | | | | | | | | | | Add support for min/max flavor selects in computeConstantRange(), which allows us to fold comparisons of a min/max against a constant in InstSimplify. This was suggested by spatel as an alternative approach to D59378. I've also added the infinite looping test from that revision here. Differential Revision: https://reviews.llvm.org/D59506 llvm-svn: 356415
* [InstCombine] Add tests for add nuw + uaddo; NFCNikita Popov2019-03-181-0/+131
| | | | | | | | | | | Baseline tests for D59471 (InstCombine of `add nuw` and `uaddo` with constants). Patch by Dan Robertson. Differential Revision: https://reviews.llvm.org/D59472 llvm-svn: 356414
* [X86] Allow any 8-bit immediate to be used with BT/BTC/BTR/BTS not just sign ↵Craig Topper2019-03-184-30/+116
| | | | | | | | extended 8-bit immediates. We need to allow [128,255] in addition to [-128, 127] to match gas. llvm-svn: 356413
* [CMake] Set LLVM_DEFAULT_EXTERNAL_LIT in standalone build correctly on windowsAlex Langford2019-03-181-1/+6
| | | | | | | LLVM installed llvm-lit with a .py suffix on windows. Let's match that behavior here. llvm-svn: 356412
* [GlobalISel] Include missing change from r356396Amara Emerson2019-03-181-4/+2
| | | | | | Forgot to add a change to relax some asserts in r356396. llvm-svn: 356411
* [WebAssembly] Don't override default implementation of isOffsetFoldingLegal. ↵Sam Clegg2019-03-183-8/+1
| | | | | | | | | | | | | | | NFC. The default implementation does we want and is going to more compatible with dynamic linking (-fPIC) support that is planned. This is NFC because currently we only build wasm with `-relocation-model=static` which in turn means that the default `isOffsetFoldingLegal` always returns true today. Differential Revision: https://reviews.llvm.org/D54661 llvm-svn: 356410
* [ValueTracking][InstSimplify] Move abs handling into computeConstantRange(); NFCNikita Popov2019-03-182-41/+32
| | | | | | | | | | | This is preparation for D59506. The InstructionSimplify abs handling is moved into computeConstantRange(), which is the general place for such calculations. This is NFC and doesn't affect the existing tests in test/Transforms/InstSimplify/icmp-abs-nabs.ll. Differential Revision: https://reviews.llvm.org/D59511 llvm-svn: 356409
* [InstSimplify] Add additional icmp of min/max tests; NFCNikita Popov2019-03-181-0/+150
| | | | | | These are baseline tests for D59506. llvm-svn: 356408
* [X86] Use relocImm in the ROL8ri/ROL16ri/ROL32ri/ROL64ri patterns to be ↵Craig Topper2019-03-182-4/+22
| | | | | | consistent with the ROR patterns. llvm-svn: 356407
* [X86] Replace uses of i64immSExt32_su with i64relocImmSExt32_su.Craig Topper2019-03-183-7/+2
| | | | | | For the i8, i16, and i32 instructions we were using a relocImm. Presumably we should for i64 as well. llvm-svn: 356406
* [AMDGPU] Enable code selection using `s_mul_hi_u32`/`s_mul_hi_i32`.Michael Liao2019-03-183-2/+16
| | | | | | | | | | Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59501 llvm-svn: 356405
* [llvm-objcopy] Make .build-id linking atomicJake Ehrlich2019-03-183-37/+93
| | | | | | | | This change makes linking into .build-id atomic and safe to use. Some users under particular workflows are reporting that this races more than half the time under particular conditions. llvm-svn: 356404
* [InstCombine] Improve with.overflow intrinsic tests; NFCNikita Popov2019-03-182-58/+123
| | | | | | | | | | | - Do not use unnamed values in saddo tests - Add tests for canonicalization of a constant arg0 Patch by Dan Robertson. Differential Revision: https://reviews.llvm.org/D59476 llvm-svn: 356403
* Restore comment regarding why Reloc::PIC_ can't be PICSam Clegg2019-03-181-2/+3
| | | | | | | | | The original change back in rL29307 explained this but it was lost somewhere along the way. Differential Revision: https://reviews.llvm.org/D59445 llvm-svn: 356402
* [API] Remove unneded LLDB_DISABLE_PYTHON markers.Davide Italiano2019-03-1811-73/+0
| | | | llvm-svn: 356401
* Fix flat-error-unsupported-gpu-hsa testAlexandre Ganea2019-03-181-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D59505 llvm-svn: 356400
* [AMDGPU] Asm/disasm clamp modifier on vop3 int arithmeticTim Renouf2019-03-1823-190/+334
| | | | | | | | | | | | | | Allow the clamp modifier on vop3 int arithmetic instructions in assembly and disassembly. This involved adding a clamp operand to the affected instructions in MIR and MC, and thus having to fix up several places in codegen and MIR tests. Differential Revision: https://reviews.llvm.org/D59267 Change-Id: Ic7775105f02a985b668fa658a0cd7837846a534e llvm-svn: 356399
* [AMDGPU] Asm/disasm v_cndmask_b32_e64 with abs/neg source modifiersTim Renouf2019-03-1823-115/+217
| | | | | | | | | | | | | | | | | This commit allows v_cndmask_b32_e64 with abs, neg source modifiers on src0, src1 to be assembled and disassembled. This does appear to be allowed, even though they are floating point modifiers and the operand type is b32. To do this, I added src0_modifiers and src1_modifiers to the MachineInstr, which involved fixing up several places in codegen and mir tests. Differential Revision: https://reviews.llvm.org/D59191 Change-Id: I69bf4a8c73ebc65744f6110bb8fc4e937d79fbea llvm-svn: 356398
* [Sema] Add some compile time _FORTIFY_SOURCE diagnosticsErik Pilkington2019-03-1816-106/+280
| | | | | | | | | | | | | | | | | | | | | | | These diagnose overflowing calls to subset of fortifiable functions. Some functions, like sprintf or strcpy aren't supported right not, but we should probably support these in the future. We previously supported this kind of functionality with -Wbuiltin-memcpy-chk-size, but that diagnostic doesn't work with _FORTIFY implementations that use wrapper functions. Also unlike that diagnostic, we emit these warnings regardless of whether _FORTIFY_SOURCE is actually enabled, which is nice for programs that don't enable the runtime checks. Why not just use diagnose_if, like Bionic does? We can get better diagnostics in the compiler (i.e. mention the sizes), and we have the potential to diagnose sprintf and strcpy which is impossible with diagnose_if (at least, in languages that don't support C++14 constexpr). This approach also saves standard libraries from having to add diagnose_if. rdar://48006655 Differential revision: https://reviews.llvm.org/D58797 llvm-svn: 356397
* Revert r356304: remove subreg parameter from MachineIRBuilder::buildCopy()Amara Emerson2019-03-183-13/+19
| | | | | | | | | | | | | After review comments, it was preferred to not teach MachineIRBuilder about non-generic instructions beyond using buildInstr(). For AArch64 I've changed the buildCopy() calls to buildInstr() + a separate addReg() call. This also relaxes the MachineIRBuilder's COPY checking more because it may not always have a SrcOp given to it. llvm-svn: 356396
* [DebugInfo][PDB] Don't write empty debug streamsAlexandre Ganea2019-03-187-16/+36
| | | | | | | | | | | Before, empty debug streams were written as 8 bytes (4 bytes signature + 4 bytes for the GlobalRefs count). With this patch, unused empty streams aren't emitted anymore. Modules now encode 65535 as an 'unused stream' value, by convention. Also fix the * Linker * contrib section which wasn't correctly emitted previously. Differential Revision: https://reviews.llvm.org/D59502 llvm-svn: 356395
* [MsgPack][AMDGPU] Fix unflushed raw_string_ostream bugs on windows expensive ↵Tim Renouf2019-03-182-3/+5
| | | | | | | | | | | | | checks bot This fixes a couple of unflushed raw_string_ostream bugs in recent commits that only show up on a bot building on windows with expensive checks. Differential Revision: https://reviews.llvm.org/D59396 Change-Id: I9c6208325503b3ee0786b4b688e13fc24a15babf llvm-svn: 356394
* [X86] Rename imm8_su/imm16_su/imm32_su to ↵Craig Topper2019-03-182-9/+9
| | | | | | relocImm8_su/relocImm16_su/relocImm32_su/ to accurately reflect what they are. llvm-svn: 356393
* [SCEV] Guard movement of insertion point for loop-invariantsWarren Ristow2019-03-183-41/+178
| | | | | | | | | | | | | | | | | | | | | This reinstates r347934, along with a tweak to address a problem with PHI node ordering that that commit created (or exposed). (That commit was reverted at r348426, due to the PHI node issue.) Original commit message: r320789 suppressed moving the insertion point of SCEV expressions with dev/rem operations to the loop header in non-loop-invariant situations. This, and similar, hoisting is also unsafe in the loop-invariant case, since there may be a guard against a zero denominator. This is an adjustment to the fix of r320789 to suppress the movement even in the loop-invariant case. This fixes PR30806. Differential Revision: https://reviews.llvm.org/D57428 llvm-svn: 356392
* [AArch64] Small fix for getIntImmCostAdhemerval Zanella2019-03-182-2/+110
| | | | | | | | | | | It uses the generic AArch64_IMM::expandMOVImm to get the correct number of instruction used in immediate materialization. Reviewers: efriedma Differential Revision: https://reviews.llvm.org/D58461 llvm-svn: 356391
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