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* [Hexagon] Generate valignb for shifting shuffles (instead of vdelta)Krzysztof Parzyszek2018-03-023-11/+2583
| | | | llvm-svn: 326627
* [RISCV] Implement MC relaxations for compressed instructions.Sameer AbuAsal2018-03-025-10/+231
| | | | | | | | | | | | | | | | | | Summary: This patch implements relaxation for RISCV in the MC layer. The following relaxations are currently handled: 1) Relax C_BEQZ to BEQ and C_BNEZ to BNEZ in RISCV. 2) Relax and C_J $imm to JAL x0, $imm and CJAL to JAL ra, $imm. Reviewers: asb, llvm-commits, efriedma Reviewed By: asb Subscribers: shiva0217 Differential Revision: https://reviews.llvm.org/D43055 llvm-svn: 326626
* Make llvm::djbHash an inline function.Rui Ueyama2018-03-022-12/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D43644 llvm-svn: 326625
* PR36581: Support data recursion over Stmts in AST matchers.Richard Smith2018-03-021-11/+16
| | | | llvm-svn: 326624
* Remove -i command line option, add -imultilibErich Keane2018-03-022-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I discovered that '-i' is a command line option for the driver, however it actually does not do anything and is not supported by any other compiler. In fact, it is completely undocumented for Clang. I found a couple of instances of people confusing it with one of the variety of other command line options that control the driver. Because of this, we should delete this option so that it is clear that it isn't valid. HOWEVER, I found that GCC DOES support -imultilib, which the -i was hiding our lack of support for. We currently only use imultilib for the purpose of forwarding to gfortran (in a specific test written by chandlerc for this purpose). imultilib is a rarely used (if ever?) feature that I could find no references to on the internet, and in fact, my company's massive test suite has zero references to it ever being used. SO, this patch removes the -i option so that we will now give an error on its usage (so that it won't be confused with -I), and replaces it with -imultilib, which is now specified as a gfortran_group option. Differential Revision: https://reviews.llvm.org/D44032 llvm-svn: 326623
* Don't claim that va_start has special semantic checksReid Kleckner2018-03-022-1/+10
| | | | | | | | | | | | | | We don't have special checks for BI_va_start in Sema::CheckBuiltinFunctionCall, so setting the 't' flag for va_start in Builtins.def disables semantic checking for it. That's not desired, and IRGen crashes when it tries to generate a call to va_start that doesn't have at least one argument. Follow-up to r322573 Fixes PR36565 llvm-svn: 326622
* [Utils] Salvage debug info in recursive inst deletionVedant Kumar2018-03-022-0/+62
| | | | | | | | | | In stage2 -O3 builds of llc, this results in a 0.3% increase in the number of variables with locations, and a 0.2% increase in the number of unique source variables overall. The size of the .debug_loc section of the llc dsym increases by 0.5%. llvm-svn: 326621
* [unittests] Make some parseIR calls more readable, NFCVedant Kumar2018-03-021-146/+140
| | | | llvm-svn: 326620
* [analyzer] Don't throw NSNumberObjectConversion warning on object ↵George Karpenkov2018-03-022-2/+17
| | | | | | | | | | | | | | | initialization in if-expression ``` if (NSNumber* x = ...) ``` is a reasonable pattern in objc++, we should not warn on it. rdar://35152234 Differential Revision: https://reviews.llvm.org/D44044 llvm-svn: 326619
* [WebAssembly] Avoid cast ExprType to wasm::ValTypeSam Clegg2018-03-022-31/+60
| | | | | | | | | | | This cast was causing invalid signatures to be written for libcall functions. Add an MC test which includes a call to builtin memcpy. Differential Revision: https://reviews.llvm.org/D44037 llvm-svn: 326618
* [InstCombine] Rewrite the binary op shrinking in visitFPTrunc to avoid ↵Craig Topper2018-03-021-47/+43
| | | | | | | | | | creating overly small ConstantFPs that we'll just need to extend again. Instead of returning the smaller FP constant we now return the minimal Type the constant can fit into. We also return the Type of the input to any fp extends. The legality checks are then done on just the size of these Types. If we find something profitable we then emit FPTruncs in front of the smaller binop and assume those FPTruncs will be constant folded or combined with any ConstantFPs or fpextends. Differential Revision: https://reviews.llvm.org/D44038 llvm-svn: 326617
* [SystemZ] Fix test cases after r326613Ulrich Weigand2018-03-026-185/+50
| | | | | | I forgot to check in the updated test cases after the r326613 commit. llvm-svn: 326616
* [WebAssembly] Simplify createDefined. NFC.Rui Ueyama2018-03-021-10/+9
| | | | | | Differential Revision: https://reviews.llvm.org/D43849 llvm-svn: 326615
* Reland "[WebAssembly] More uses of uint8_t for single byte values"Heejin Ahn2018-03-022-14/+14
| | | | | | | | | | | | | | Summary: Original change was D43991 (rL326541) and was reverted by rL326571 and rL326572. This adds also the necessary MCCodeEmitter patch. Reviewers: sbc100 Subscribers: jfb, dschuff, sbc100, jgravelle-google, sunfish, llvm-commits, ncw Differential Revision: https://reviews.llvm.org/D44034 llvm-svn: 326614
* [SystemZ] Allow LRV/STRV with volatile memory accessesUlrich Weigand2018-03-021-6/+1
| | | | | | | | The byte-swapping loads and stores do not actually perform multiple accesses to their memory operand, so they are OK to use with volatile memory operands as well. Remove overly cautious check. llvm-svn: 326613
* [SystemZ] Add support for anyregcc calling conventionUlrich Weigand2018-03-026-12/+657
| | | | | | | | | | | | | This adds back-end support for the anyregcc calling convention for use with patchpoints. Since all registers are considered call-saved with anyregcc (except for 0 and 1 which may still be clobbered by PLT stubs and the like), this required adding support for saving and restoring vector registers in prologue/epilogue code for the first time. This is not used by any other calling convention. llvm-svn: 326612
* [SystemZ] Support stackmaps and patchpointsUlrich Weigand2018-03-029-1/+1028
| | | | | | | This adds back-end support for the @llvm.experimental.stackmap and @llvm.experimental.patchpoint intrinsics. llvm-svn: 326611
* [SystemZ] Fix common-code users of stack sizeUlrich Weigand2018-03-023-47/+49
| | | | | | | | | | | | | | | | | | | On SystemZ we need to provide a register save area of 160 bytes to any called function. This size needs to be added when allocating stack in the function prologue. However, it was not accounted for as part of MachineFrameInfo::getStackSize(); instead the back-end used a private routine getAllocatedStackSize(). This is OK for code-gen purposes, but it breaks other users of the getStackSize() routine, in particular it breaks the recently- added -stack-size-section feature. Fix this by updating the main stack size tracked by common code (in emitPrologue) instead of using the private routine. No change in code generation intended. llvm-svn: 326610
* [SystemZ] Support vector registers in inline asmUlrich Weigand2018-03-023-9/+174
| | | | | | | | This adds support for specifying vector registers for use with inline asm statements, either via the 'v' constraint or by explicit register names (v0 ... v31). llvm-svn: 326609
* [InstCombine] partly fix FMF for fmul+log2 foldSanjay Patel2018-03-022-58/+23
| | | | | | | | | | The code was checking that all of the instructions in the sequence are 'fast', but that's not necessary. The final multiply is all that we need to check (tests adjusted). The fmul doesn't need to be fully 'fast' either, but that can be another patch. llvm-svn: 326608
* Range-ify a for loop. NFCGeorge Burgess IV2018-03-021-5/+2
| | | | llvm-svn: 326607
* [InstCombine] add tests for rL169025; NFCSanjay Patel2018-03-021-0/+32
| | | | | | | | This narrow fold was added with no motivation or test cases a bit over 5 years ago. Removing a constant operand is a good canonicalization? We should handle Y*2.0 too then? llvm-svn: 326606
* Adds a clang-tidy test for a failing assertion in the misc-misplaced-const ↵Aaron Ballman2018-03-021-0/+15
| | | | | | | | check. The test case previously triggered an assertion in the AST matchers because the QualType being matched is invalid. That is no longer the case after r326604. llvm-svn: 326605
* Fix the hasType() AST matcher to not assert when the QualType is invalid.Aaron Ballman2018-03-021-2/+4
| | | | | | There's not a particularly good way to test this with the AST matchers unit tests because the only way to get an invalid type (that I can devise) involves creating parse errors, which the test harness always treats as a failure. Instead, a clang-tidy test case will be added in a follow-up commit based on the original bug report. llvm-svn: 326604
* [Attr] Use -fsyntax-only in testJoel E. Denny2018-03-021-1/+1
| | | | | | Suggested at: https://reviews.llvm.org/D43248 llvm-svn: 326603
* [Attr] Fix parameter indexing for several attributesJoel E. Denny2018-03-0216-150/+503
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch fixes a number of bugs related to parameter indexing in attributes: * Parameter indices in some attributes (argument_with_type_tag, pointer_with_type_tag, nonnull, ownership_takes, ownership_holds, and ownership_returns) are specified in source as one-origin including any C++ implicit this parameter, were stored as zero-origin excluding any this parameter, and were erroneously printing (-ast-print) and confusingly dumping (-ast-dump) as the stored values. * For alloc_size, the C++ implicit this parameter was not subtracted correctly in Sema, leading to assert failures or to silent failures of __builtin_object_size to compute a value. * For argument_with_type_tag, pointer_with_type_tag, and ownership_returns, the C++ implicit this parameter was not added back to parameter indices in some diagnostics. This patch fixes the above bugs and aims to prevent similar bugs in the future by introducing careful mechanisms for handling parameter indices in attributes. ParamIdx stores a parameter index and is designed to hide the stored encoding while providing accessors that require each use (such as printing) to make explicit the encoding that is needed. Attribute declarations declare parameter index arguments as [Variadic]ParamIdxArgument, which are exposed as ParamIdx[*]. This patch rewrites all attribute arguments that are processed by checkFunctionOrMethodParameterIndex in SemaDeclAttr.cpp to be declared as [Variadic]ParamIdxArgument. The only exception is xray_log_args's argument, which is encoded as a count not an index. Differential Revision: https://reviews.llvm.org/D43248 llvm-svn: 326602
* Fix more spelling mistakes in comments of LLVM Analysis passesVedant Kumar2018-03-028-15/+15
| | | | | | | | Patch by Reshabh Sharma! Differential Revision: https://reviews.llvm.org/D43939 llvm-svn: 326601
* [PatternMatch, InstSimplify] fix m_NaN to work with vector constants and use itSanjay Patel2018-03-024-10/+24
| | | | | | | | | This is NFC for the moment (and independent of any potential NaN semantic controversy). Besides making the code in InstSimplify easier to read, the motivation is to eventually allow undef elements in vector constants to match too. A proposal to add the base logic for that is in D43792. llvm-svn: 326600
* [Hexagon] Handle VACOPY in isel loweringKrzysztof Parzyszek2018-03-022-0/+19
| | | | llvm-svn: 326599
* [clangd] Use higher timoout values in TUSchedulerTest::DebounceIlya Biryukov2018-03-021-3/+4
| | | | | | Should unbreak windows buildbots. llvm-svn: 326598
* [X86][BTVER2] Fix throughput of YMM bitwise instructionsSimon Pilgrim2018-03-022-12/+32
| | | | | | | | These instructions are double-pumped, split into 2 128-bit ops and then passing through either FPU pipe. Found while testing llvm-mca (D43951) llvm-svn: 326597
* [X86] Reject xmm16-31 in inline asm constraints when AVX512 is disabledCraig Topper2018-03-022-0/+17
| | | | | | | | Fixes PR36532 Differential Revision: https://reviews.llvm.org/D43960 llvm-svn: 326596
* [InstCombine] Allow fptrunc (fpext X)) to be reduced to a single fpext/ftruncCraig Topper2018-03-023-25/+10
| | | | | | | | | | If we are only truncating bits from the extend we should be able to just use a smaller extend. If we are truncating more than the extend we should be able to just use a fptrunc since the presense of the fpextend shouldn't affect rounding. Differential Revision: https://reviews.llvm.org/D43970 llvm-svn: 326595
* [OPENMP] Scan all redeclarations looking for `declare simd` attribute.Alexey Bataev2018-03-022-65/+73
| | | | | | | | | Patch fixes the problem with the functions marked as `declare simd`. If the canonical declaration does not have associated `declare simd` construct, we may not generate required code even if other redeclarations are marked as `declare simd`. llvm-svn: 326594
* [X86][x32] Save callee-save register used as base pointer for x32 ABIDerek Schuff2018-03-022-3/+9
| | | | | | | | | | | | | For the x32 ABI, since the base pointer register (EBX) is a callee save register it should be saved before use. This fixes https://bugs.llvm.org/show_bug.cgi?id=36011 Differential Revision: https://reviews.llvm.org/D42358 Patch by Pratik Bhatu llvm-svn: 326593
* [ARM] Fold variable into assert.Benjamin Kramer2018-03-021-2/+1
| | | | | | Avoids unused variable warnings in Release mode. llvm-svn: 326592
* [utils] Add utils/update_cc_test_checks.pyFangrui Song2018-03-023-3/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A utility to update LLVM IR in C/C++ FileCheck test files. Example RUN lines in .c/.cc test files: // RUN: %clang -S -Os -DXX %s -o - | FileCheck %s // RUN: %clangxx -S -Os %s -o - | FileCheck -check-prefix=IR %s Usage: % utils/update_cc_test_checks.py --llvm-bin=release/bin test/a.cc % utils/update_cc_test_checks.py --c-index-test=release/bin/c-index-test --clang=release/bin/clang /tmp/c/a.cc // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang -emit-llvm -S -Os -DXX %s -o - | FileCheck -check-prefix=AA %s // RUN: %clangxx -emit-llvm -S -Os %s -o - | FileCheck -check-prefix=BB %s using T = #ifdef XX int __attribute__((vector_size(16))) #else short __attribute__((vector_size(16))) #endif ; // AA-LABEL: _Z3fooDv4_i: // AA: entry: // AA-NEXT: %add = shl <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1> // AA-NEXT: ret <4 x i32> %add // // BB-LABEL: _Z3fooDv8_s: // BB: entry: // BB-NEXT: %add = shl <8 x i16> %a, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> // BB-NEXT: ret <8 x i16> %add T foo(T a) { return a + a; } Differential Revision: https://reviews.llvm.org/D42712 llvm-svn: 326591
* [OPENMP] Treat local variables in CUDA mode as thread local.Alexey Bataev2018-03-023-16/+168
| | | | | | | | In CUDA mode all local variables are actually thread local|threadprivate, not private, and, thus, they cannot be shared between threads|lanes. llvm-svn: 326590
* AMDGPU/GlobalISel: InstrMapping for G_ZEXTMatt Arsenault2018-03-022-0/+51
| | | | llvm-svn: 326589
* AMDGPU/GlobalISel: InstrMapping for G_TRUNCMatt Arsenault2018-03-022-0/+41
| | | | llvm-svn: 326588
* AMDGPU/GlobalISel: Define InstrMappings for G_FCMPMatt Arsenault2018-03-022-0/+78
| | | | | | Patch by Tom Stellard llvm-svn: 326587
* AMDGPU/GlobalISel: Define instruction mapping for @llvm.minnumMatt Arsenault2018-03-022-0/+67
| | | | | | Patch by Tom Stellard llvm-svn: 326586
* LoopUnroll: respect pragma unroll when AllowRemainder is disabledYaxun Liu2018-03-023-27/+134
| | | | | | | | | | | | | Currently when AllowRemainder is disabled, pragma unroll count is not respected even though there is no remainder. This bug causes a loop fully unrolled in many cases even though the user specifies a unroll count. Especially it affects OpenCL/CUDA since in many cases a loop contains convergent instructions and currently AllowRemainder is disabled for such loops. Differential Revision: https://reviews.llvm.org/D43826 llvm-svn: 326585
* [ARM] Fix access to stack arguments when re-aligning SP in Armv6mMomchil Velikov2018-03-023-17/+424
| | | | | | | | | | | | | | | | | | | | When an Armv6m function dynamically re-aligns the stack, access to incoming stack arguments (and to stack area, allocated for register varargs) is done via SP, which is incorrect, as the SP is offset by an unknown amount relative to the value of SP upon function entry. This patch fixes it, by making access to "fixed" frame objects be done via FP when the function needs stack re-alignment. It also changes the access to "fixed" frame objects be done via FP (instead of using R6/BP) also for the case when the stack frame contains variable sized objects. This should allow more objects to fit within the immediate offset of the load instruction. All of the above via a small refactoring to reuse the existing `ARMFrameLowering::ResolveFrameIndexReference.` Differential Revision: https://reviews.llvm.org/D43566 llvm-svn: 326584
* [WebAssembly] Rename global types to match the notation in the specNicholas Wilson2018-03-021-4/+2
| | | | llvm-svn: 326583
* [MergeICmps] Revert accidentally submitted failing test case.Clement Courbet2018-03-021-160/+0
| | | | | | Reverts r326574. llvm-svn: 326582
* [WebAssembly] Export non-hidden defined data symbols via wasm globalsNicholas Wilson2018-03-026-8/+56
| | | | | | | | This fixes a TODO introduced in rLLD325861. Differential Revision: https://reviews.llvm.org/D43930 llvm-svn: 326581
* [WebAssembly] Pass ownership of body to SyntheticFunction. NFCNicholas Wilson2018-03-022-15/+15
| | | | | | | | | This avoids the Writer unnecessarily having a member to retain ownership of the function body. Differential Revision: https://reviews.llvm.org/D43933 llvm-svn: 326580
* [WebAssembly] Add validation for init function signatureNicholas Wilson2018-03-021-3/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D43947 llvm-svn: 326579
* [Power9] Add missing instructions to the Power 9 schedulerStefan Pintilie2018-03-021-8/+59
| | | | | | | Adding more instructions using InstRW so that we can move away from ItinRW and ultimately have a complete Power 9 scheduler. llvm-svn: 326578
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