| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 254318
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llvm-svn: 254317
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Thanks Alexey.
llvm-svn: 254316
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The MachineVerifier wants to check that the register operands of an
instruction belong to the instruction's register class. RIP-relative
control flow instructions violated this by referencing RIP. While this
was fixed for SysV, it was never fixed for Win64.
llvm-svn: 254315
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Re-enable shrink wrapping for PPC64 Little Endian.
One minor modification to PPCFrameLowering::findScratchRegister was necessary to handle fall-thru blocks (blocks with no terminator) correctly.
Tested with all LLVM test, clang tests, and the self-hosting build, with no problems found.
PHabricator: http://reviews.llvm.org/D14778
llvm-svn: 254314
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We were not looking past casts to see if an element should be included
or not.
llvm-svn: 254313
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llvm-svn: 254311
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llvm-svn: 254310
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Splitted writeTo to separate tls relocs handling stuff which is too long for one method now. NFC.
Differential revision: http://reviews.llvm.org/D15012
llvm-svn: 254309
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This results in a significant reduction in the size of the sanitizer libraries.
llvm-svn: 254308
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llvm-svn: 254307
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the gcc libraries clang picks for when it was configures with a user defined
path.
llvm-svn: 254306
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The use of C++'s high-level iterator functionality instead of two while loops
and explicit iterator handling improves readability of this code.
Proposed-by: Michael Kruse <llvm@meinersbur.de>
Differential Revision: http://reviews.llvm.org/D15068
llvm-svn: 254305
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This hasn't been doing anything since using relocations was added.
llvm-svn: 254304
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optional arguments are not supplied.
Patch thanks to Joe Ranieri!
llvm-svn: 254303
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llvm-svn: 254302
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On OS X, in AtosSymbolizer, if the answer from atos doesn't contain module name, let's bail and return false. There are some cases where this is beneficial, because we'll try DlAddrSymbolizer next (it's next in the symbolizer chain), which might be able to symbolize something that atos couldn't.
Differential Revision: http://reviews.llvm.org/D15071
llvm-svn: 254301
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instead. NFC.
Changing comments that have references to code.google.com to point to GitHub instead, because the current links are not redirected properly (they instead redirect to different issues, mostly ASan). NFC.
Differential Revision: http://reviews.llvm.org/D15053
llvm-svn: 254300
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1) There's a few wrongly defined things in tsan_interceptors.cc,
2) a typo in tsan_rtl_amd64.S which calls setjmp instead of sigsetjmp in the interceptor, and
3) on OS X, accessing an mprotected page results in a SIGBUS (and not SIGSEGV).
Differential Revision: http://reviews.llvm.org/D15052
llvm-svn: 254299
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On OS X, for weak function (that user can override by providing their own implementation in the main binary), we need extern `"C" SANITIZER_INTERFACE_ATTRIBUTE SANITIZER_WEAK_ATTRIBUTE NOINLINE`.
Fixes a broken test case on OS X, java_symbolization.cc, which uses a weak function __tsan_symbolize_external.
Differential Revision: http://reviews.llvm.org/D14907
llvm-svn: 254298
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MFHI, MFLO, MTHI and MTLO instructions
Differential Revision: http://reviews.llvm.org/D14436
llvm-svn: 254297
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Value of offset operand for microMIPS BALC and BC instructions is currently shifted 2 bits, but it should be 1 bit.
Differential Revision: http://reviews.llvm.org/D14770
llvm-svn: 254296
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Differential Revision: http://reviews.llvm.org/D15069
llvm-svn: 254295
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This patch adds functionality for dumping allocations of struct elements. This involves:
+ Jitting the runtime for details on all the struct fields.
+ Finding the name of the struct type by looking for a global variable of the same type, which will have been reflected back to the java host code.
+ Using this struct type name to pass into expression evaluation for pretty printing the data for the dump command.
llvm-svn: 254294
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valid-xfail.s is for instructions that should be valid in the given ISA but
incorrectly fail. MSA instructions are correct to fail since MSA is not enabled.
llvm-svn: 254293
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build errors on ARM. Define it internally to avoid such errors.
Patch by Max Ostapenko.
Differential Revision: http://reviews.llvm.org/D14921
llvm-svn: 254292
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PRECRQ.QB.PH, PRECRQU_S.QB.PH and PRECRQ_RS.PH.W instructions
Differential Revision: http://reviews.llvm.org/D14605
llvm-svn: 254291
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llvm-svn: 254290
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llvm-svn: 254289
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llvm-svn: 254288
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llvm-svn: 254287
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llvm-svn: 254286
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llvm-svn: 254285
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llvm-svn: 254284
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llvm-svn: 254283
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llvm-svn: 254282
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llvm-svn: 254281
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build bot.
llvm-svn: 254280
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llvm-svn: 254279
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llvm-svn: 254278
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vector. This is reflected correctly in the intrinsics, but was not refelected in the isel patterns.
For the floating point types, this requires adding a bitcast to the index vector when its passed through to the output.
llvm-svn: 254277
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The lambda is more readable.
llvm-svn: 254276
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llvm-svn: 254275
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verify there are no others.
llvm-svn: 254274
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llvm-svn: 254273
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llvm-svn: 254272
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llvm-svn: 254271
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index input.
llvm-svn: 254270
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for its shuffle indices.
llvm-svn: 254269
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llvm-svn: 254268
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