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* [dwarfdump] Add -show-formJonas Devlieghere2017-10-025-5/+54
| | | | | | | | | This enables printing of DWARF form types after the DWARF attribute types. Differential revision: https://reviews.llvm.org/D38459 llvm-svn: 314685
* Revert "Add support for custom loaders to the sanitizer symbolizer"Francis Ricci2017-10-026-23/+1
| | | | | | This reverts commit r314671, which hangs on the gcc sanitizer buildbot. llvm-svn: 314684
* [clang-format] Fix regression about short functions after #elseKrasimir Georgiev2017-10-022-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch fixes a regression introduced in r312904, where the formatter confuses the `else` in `#else` with an `else` of an `if-else` statement. For example, formatting this code with google style ``` #ifdef A int f() {} #else int f() {} #endif ``` resulted in ``` #ifdef A int f() {} #else int f() { } #endif ``` Reviewers: sammccall Reviewed By: sammccall Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D37973 llvm-svn: 314683
* [X86][SSE] Add PACKSS/PACKUS constant folding tests Simon Pilgrim2017-10-023-16/+214
| | | | llvm-svn: 314682
* Regenerate test (missing broadcast constant comments). NFCI.Simon Pilgrim2017-10-021-8/+8
| | | | | | Still avoiding the floating point comments to prevent linux/windows discrepancies. llvm-svn: 314681
* Regenerate test (missing broadcast constant comments). NFCI.Simon Pilgrim2017-10-021-3/+3
| | | | llvm-svn: 314680
* Regenerate test. NFCI.Simon Pilgrim2017-10-021-2/+0
| | | | llvm-svn: 314679
* [clangd] Command line arg to specify compile_commands.json pathIlya Biryukov2017-10-025-24/+79
| | | | | | | | | | Summary: Adds compileCommands command line argument to specify an absolute path directly to the requested compile_commands.json for flags. Reviewed By: ilya-biryukov Differential Revision: https://reviews.llvm.org/D37150 llvm-svn: 314678
* [clangd] Run clang-format on the source code. NFC.Ilya Biryukov2017-10-021-2/+2
| | | | llvm-svn: 314677
* use range-for-loops; NFCISanjay Patel2017-10-021-9/+8
| | | | llvm-svn: 314676
* [MIPS] Fix PLT entries generation in case of linking regular and microMIPS codeSimon Atanasyan2017-10-029-26/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently LLD calls the `isMicroMips` routine to determine type of PLT entries needs to be generated: regular or microMIPS. This routine checks ELF header flags in the `FirstObj` to retrieve type of linked object files. So if the first file does not contain microMIPS code, LLD will generate PLT entries with regular (non-microMIPS) code only. Ideally, if a PLT entry is referenced by microMIPS code only this entry should contain microMIPS code, if a PLT entry is referenced by regular code this entry should contain regular code. In a "mixed" case the PLT entry can be either microMIPS or regular, but each "cross-mode-call" has additional cost. It's rather difficult to implement this ideal solution. But we can assume that if there is an input object file with microMIPS code, the most part of the code is microMIPS too. So we need to deduce type of PLT entries based on finally calculated ELF header flags and do not check only the first input object file. This change implements this. - The `getMipsEFlags` renamed to the `calcMipsEFlags`. The function called from the `LinkerDriver::link`. Result is stored in the Configuration::MipsEFlags field. - The `isMicroMips` and `isMipsR6` routines access the `MipsEFlags` field to get and check calculated ELF flags. - New types of PLT records created when necessary. Differential revision: https://reviews.llvm.org/D37747 llvm-svn: 314675
* [AsmParser] Support GAS's .print directiveCoby Tayree2017-10-022-0/+36
| | | | | | Differential Revision: https://reviews.llvm.org/D38448 llvm-svn: 314674
* [OPENMP] Fix test, NFC.Alexey Bataev2017-10-021-2/+2
| | | | llvm-svn: 314673
* Improve FreeBSD kernel debuggingEd Maste2017-10-0211-60/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FreeBSD kernel modules are actually relocatable (.o) ELF files and this previously caused some issues for LLDB. This change addresses these when using lldb to symbolicate FreeBSD kernel backtraces. The major problems: - Relocations were not being applied to the DWARF debug info despite there being code to do this. Several issues prevented it from working: - Relocations are computed at the same time as the symbol table, but in the case of split debug files, symbol table parsing always redirects to the primary object file, meaning that relocations would never be applied in the debug file. - There's actually no guarantee that the symbol table has been parsed yet when trying to parse debug information. - When actually applying relocations, it will segfault because the object files are not mapped with MAP_PRIVATE and PROT_WRITE. - LLDB returned invalid results when performing ordinary address-to- symbol resolution. It turned out that the addresses specified in the section headers were all 0, so LLDB believed all the sections had overlapping "file addresses" and would sometimes return a symbol from the wrong section. Patch by Brian Koropoff Differential Revision: https://reviews.llvm.org/D38142 llvm-svn: 314672
* Add support for custom loaders to the sanitizer symbolizerFrancis Ricci2017-10-026-1/+23
| | | | | | | | | | | | | | | | | Summary: Adds a fallback mode to procmaps when the symbolizer fails to locate a module for a given address by using dl_iterate_phdr. Reviewers: kubamracek, rnk, vitalybuka, eugenis Reviewed By: eugenis Subscribers: srhines, llvm-commits Differential Revision: https://reviews.llvm.org/D37269 llvm-svn: 314671
* [OPENMP] Simplify codegen for non-offloading code.Alexey Bataev2017-10-029-285/+148
| | | | | | | Simplified and generalized codegen for non-offloading part that works if offloading is failed or condition of the `if` clause is `false`. llvm-svn: 314670
* remove duplicate comments, reposition related functions; NFCSanjay Patel2017-10-021-56/+49
| | | | llvm-svn: 314669
* Dependent Address Space Support Test FixAndrew Gozillon2017-10-021-2/+2
| | | | | | | | | | | | Modifying a non-type template integer arguement that is causing errors in some builds as it's too large for 32-bit longs. This hopefully (and seems to when testing) should fix all of the build bot errors relating to this test. I also modified the name of the function call to be more apt. Differential Revision: https://reviews.llvm.org/D33666 llvm-svn: 314668
* [X86][SSE] Fix -Wsign-compare problems introduced in r314658Bjorn Pettersson2017-10-021-4/+4
| | | | | | | | | | | The refactoring in "[X86][SSE] Add createPackShuffleMask helper function. NFCI." resulted in warning when compiling the code (seen in build bots). This patch restores some types from int to unsigned to avoid those warnings. llvm-svn: 314667
* [Debug info] Handle endianness when moving debug info for split integer valuesBjorn Pettersson2017-10-022-2/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Take the target's endianness into account when splitting the debug information in DAGTypeLegalizer::SetExpandedInteger. This patch fixes so that, for big-endian targets, the fragment expression corresponding to the high part of a split integer value is placed at offset 0, in order to correctly represent the memory address order. I have attached a PPC32 reproducer where the resulting DWARF pieces for a 64-bit integer were incorrectly reversed. Patch by: dstenb Reviewers: JDevlieghere, aprantl, dblaikie Reviewed By: JDevlieghere, aprantl, dblaikie Subscribers: nemanjai Differential Revision: https://reviews.llvm.org/D38172 llvm-svn: 314666
* [ScopBuilder] Iterate over statement instructions. NFC.Michael Kruse2017-10-021-39/+28
| | | | | | | | | Iterate over statement instructions instead over basic block instructions when creating MemoryAccesses. It allows making the creation of MemoryAccesses independent of how the basic blocks are split into multiple ScopStmts. llvm-svn: 314665
* [ScopBuilder] Build invariant loads separately.Michael Kruse2017-10-025-14/+58
| | | | | | | | | | | | | | | | | | Create the MemoryAccesses of invariant loads separately and before all other MemoryAccesses. Invariant loads are classified as synthesizable and therefore are not contained in any statement. When iterating over all instructions of all statements, the invariant loads are consequently not processed and iterating over them separately becomes necessary. This patch can change the order in which MemoryAccesses are created, but otherwise has no functional change. Some temporary code is introduced to ensure correctness, but will be removed in the next commit. llvm-svn: 314664
* [ScopBuilder] Build escaping dependencies separately.Michael Kruse2017-10-025-10/+17
| | | | | | | | | | | | | Instructions that compute escaping values might be synthesizable and therefore not contained in any ScopStmt. When buildAccessFunctions is changed to only iterate over the instruction list of statement, "free" instructions still need to be written. We do this after the main MemoryAccesses have been created. This can change the order in which MemoryAccesses are created, but has otherwise no functional change. llvm-svn: 314663
* [ScopBuilder] Specialize exit block handling. NFC.Michael Kruse2017-10-022-18/+16
| | | | | | | | | | | Decouple handling of exit block PHIs and other MemoryAccesses. Exit PHIs only need the PHI handling part of buildAccessFunctions but requires code for skipping them in while creating other MemoryAcesses. This change will make it easier to modify how statement MemoryAccesses are created without considering the exit block special case. llvm-svn: 314662
* [ForwardOpTree] Fix out-of-quota in assertion.Michael Kruse2017-10-021-1/+1
| | | | llvm-svn: 314661
* [CodeGen] Have a special function to get TBAA info for may-alias accessesIvan A. Kosarev2017-10-025-8/+23
| | | | | | | | | This is part of D37826 reworked to be a separate patch to simplify review. Differential Revision: https://reviews.llvm.org/D38408 llvm-svn: 314660
* Use %run for running CFI testsFilipe Cabecinhas2017-10-0214-135/+135
| | | | | | | | | | Reviewers: pcc, krasin, eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38412 llvm-svn: 314659
* [X86][SSE] Add createPackShuffleMask helper function. NFCI.Simon Pilgrim2017-10-021-10/+19
| | | | llvm-svn: 314658
* [CodeGen] Do not refer to complete TBAA info where we actually deal with ↵Ivan A. Kosarev2017-10-029-58/+62
| | | | | | | | | | | | | | just TBAA access types This patch fixes misleading names of entities related to getting, setting and generation of TBAA access type descriptors. This is effectively an attempt to provide a review for D37826 by breaking it into smaller pieces. Differential Revision: https://reviews.llvm.org/D38404 llvm-svn: 314657
* [X86][SSE] matchBinaryVectorShuffle - add support for different src/dst ↵Simon Pilgrim2017-10-021-12/+12
| | | | | | | | value shuffle types Preparation for support for combining to PACKSS/PACKUS llvm-svn: 314656
* [PowerPC] support ZERO_EXTEND in tryBitPermutationHiroshi Inoue2017-10-022-17/+87
| | | | | | | | | | | | | | | | | | | This patch add a support of ISD::ZERO_EXTEND in PPCDAGToDAGISel::tryBitPermutation to increase the opportunity to use rotate-and-mask by reordering ZEXT and ANDI. Since tryBitPermutation stops analyzing nodes if it hits a ZEXT node while traversing SDNodes, we want to avoid ZEXT between two nodes that can be folded into a rotate-and-mask instruction. For example, we allow these nodes t9: i32 = add t7, Constant:i32<1> t11: i32 = and t9, Constant:i32<255> t12: i64 = zero_extend t11 t14: i64 = shl t12, Constant:i64<2> to be folded into a rotate-and-mask instruction. Such case often happens in array accesses with logical AND operation in the index, e.g. array[i & 0xFF]; Differential Revision: https://reviews.llvm.org/D37514 llvm-svn: 314655
* [ELF] - Stop removing sections in removeUnusedSyntheticSections().George Rimar2017-10-022-6/+5
| | | | | | | | | | That makes code a bit more consistent. Instead of removing sections there we can just mark them as dead. So that removeEmptyCommands() will handle the rest. Differential revision: https://reviews.llvm.org/D38393 llvm-svn: 314654
* Fix typo in comment. NFCI.Simon Pilgrim2017-10-021-1/+1
| | | | llvm-svn: 314653
* [X86] Cleanup uses of computeKnownBits by using MaskedValueIsZero helper ↵Simon Pilgrim2017-10-021-6/+3
| | | | | | instead. NFCI. llvm-svn: 314652
* [X86][LLVM]Expanding Supports lowerInterleaved{store|load}() in ↵Michael Zuckerman2017-10-024-974/+676
| | | | | | | | | | | | | | | | | | | X86InterleavedAccess (VF64 stride 3-4) I continue to support different VF interleaved and in this pass for this patch, I added the vf64 stride3 support for both load and store. I also added support fot the stride4 store. Reviewers: 1. zvi 2. dorit 3. igorb 4. guyblank Differential Revision: https://reviews.llvm.org/D37687 Change-Id: I3d238efedf217d1768b348d710de1efa2f19d27b llvm-svn: 314651
* Dependent Address Space Support Test FileAndrew Gozillon2017-10-021-0/+119
| | | | | | | | Adding regression test for Dependent Address Spaces in relation to https://reviews.llvm.org/D33666 I forgot to svn add the test file before commiting the prior changes. I appologies. llvm-svn: 314650
* Dependent Address Space SupportAndrew Gozillon2017-10-0221-45/+591
| | | | | | | | | | | | | | This patch relates to: https://reviews.llvm.org/D33666 This adds support for template parameters to be passed to the address_space attribute. The main goal is to add further flexibility to the attribute and allow for it to be used easily with templates. The main additions are a new type (DependentAddressSpaceType) alongside its TypeLoc and its mangling. As well as the logic required to support dependent address spaces which mainly resides in TreeTransform.h and SemaType.cpp. llvm-svn: 314649
* [X86] Fix copy pasto in X86FastISel::fastEmitInst_rrrr.Craig Topper2017-10-021-1/+1
| | | | | | The 4th operand was not being constrained and the third operand was being constrained twice. llvm-svn: 314648
* [X86] Use a bool flag instead of assigning an unsigned to two different ↵Craig Topper2017-10-021-9/+8
| | | | | | values that we only use in an equality comparison. llvm-svn: 314647
* [cmake] Add a separate CMake var to control profile runtimeMichal Gorny2017-10-023-3/+5
| | | | | | | | | | | | Make it possible to control building profile runtime separately from other options. Before r313549, the profile runtime building was controlled along with sanitizers. However, since that commit it is built unconditionally which results in multiple builds for people building different runtimes separately. Differential Revision: https://reviews.llvm.org/D38441 llvm-svn: 314646
* Update for LLVM change.Rui Ueyama2017-10-021-1/+1
| | | | | | | r314639 ([X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMem) broke the test. llvm-svn: 314645
* [ICF] Include section contents in section hash values.Rui Ueyama2017-10-022-6/+8
| | | | | | | | | | | | Computing section content hashes early seems like a win in terms of performance. It increases a chance that two different sections will get different class IDs from the beginning. Without threads, this patch improves Chromium link time by about 0.3 seconds. With threads, by 0.1 seconds. That's less than 1% time saving but not bad for a small patch. llvm-svn: 314644
* [X86] Use _NOREX MOVZX instructions for some patterns even in 32-bit mode.Craig Topper2017-10-021-32/+6
| | | | | | This unifies the patterns between both modes. This should be effectively NFC since all the available registers in 32-bit mode statisfy this constraint. llvm-svn: 314643
* [Hexagon] Check vector elements for equivalence in the ↵Ron Lieberman2017-10-022-1/+102
| | | | | | | | | | | | | HexagonVectorLoopCarriedReuse pass If the two instructions being compared for equivalence have corresponding operands that are integer constants, then check their values to determine equivalence. Patch by Suyog Sarda! llvm-svn: 314642
* [Hexagon] Patch to Extract i1 element from vector of i1Ron Lieberman2017-10-022-1/+16
| | | | | | | This patch extracts 1 element from vector consisting of elements of size 1 bit at given index. llvm-svn: 314641
* [InstCombine] Use APInt for all the math in foldICmpDivConstantCraig Topper2017-10-011-95/+46
| | | | | | | | | | | | | | Summary: This currently uses ConstantExpr to do its math, but as noted in a TODO it can all be done directly on APInt. Reviewers: spatel, majnemer Reviewed By: majnemer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38440 llvm-svn: 314640
* [X86] Change register&memory TEST instructions from MRMSrcMem to MRMDstMemCraig Topper2017-10-0115-53/+52
| | | | | | | | | | | | | | | | | | | Summary: Intel documentation shows the memory operand as the first operand. But we currently treat it as the second operand. Conceptually the order doesn't matter since it doesn't write memory. We have aliases to parse with the operands in either order and the isel matching is commutable. For the register&register form order does matter for the assembly parser. PR22995 was previously filed and fixed by changing the register&register form from MRMSrcReg to MRMDestReg to match gas. Ideally the memory form should match by using MRMDestMem. I believe this supercedes D38025 which was trying to switch the register&register form back to pre-PR22995. Reviewers: aymanmus, RKSimon, zvi Reviewed By: aymanmus Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38120 llvm-svn: 314639
* [X86] Remove a couple unnecessary COPY_TO_REGCLASS from some output patterns ↵Craig Topper2017-10-011-9/+7
| | | | | | where the instruction already produces the correct register class. llvm-svn: 314638
* Inline hot functions.Rui Ueyama2017-10-012-15/+3
| | | | llvm-svn: 314637
* [ScopDetect] Do not add loads out of the SCoP to required invariant loads.Michael Kruse2017-10-012-1/+85
| | | | | | | | | | | | | | | | Loads before the SCoP are always invariant within the SCoP and therefore are no "required invariant loads". An assertion failes in ScopBuilder when it finds such an invariant load. Fix by not adding such loads to the required invariant load list. This likely will cause the region to be not considered a valid SCoP. We may want to unconditionally accept instructions defined before the region as valid invariant conditions instead of rejecting them. This fixes a compilation crash of SPEC CPU2006 453.povray's render.cpp. llvm-svn: 314636
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