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* [InstCombine] Fix issue with X udiv 2^C -> X >> C for non-splat constant vectorsSimon Pilgrim2018-02-082-3/+25
| | | | | | foldUDivPow2Cst was assuming that the input was a scalar or a splat constant llvm-svn: 324608
* [Parser][FixIt] Better diagnostics for "typedef" instead of "typename" typoJan Korous2018-02-084-14/+47
| | | | | | | | rdar://problem/10214588 Differential Revision: https://reviews.llvm.org/D42170 llvm-svn: 324607
* [ARM] Re-commit r324600 with fixed LLVMBuild.txtOliver Stannard2018-02-084-12/+36
| | | | | | | | | | | | | | | | | | | | | | ARMDisassembler now depends on the banked register tables in ARMUtils, so the LLVMBuild.txt needed updating to reflect this. Original commit mesage: [ARM] Fix disassembly of invalid banked register moves When disassembling banked register move instructions, we don't have an assembly syntax for the unallocated register numbers, so we have to return Fail rather than SoftFail. Previously we were returning SoftFail, then crashing in the InstPrinter as we have no way to represent these encodings in an assembly string. This also switches the decoder to use the table-generated list of banked registers, removing the duplicated list of encodings. Differential revision: https://reviews.llvm.org/D43066 llvm-svn: 324606
* Fix unused variable warning.Simon Pilgrim2018-02-081-1/+1
| | | | llvm-svn: 324605
* Revert r324600 as it breaks a buildbotOliver Stannard2018-02-083-35/+11
| | | | | | | | The broken bot (clang-ppc64le-linux-multistage) is doign a shared-object build, so I guess using lookupBankedRegByEncoding in the disassembler is a layering violation? llvm-svn: 324604
* [InstCombine] Improve mul(x, pow2) -> shl combine for vector constantsSimon Pilgrim2018-02-083-19/+23
| | | | | | Refactor getLogBase2Vector into getLogBase2 to accept all scalars/vectors. Generalize from ConstantDataVector to support all constant vectors. llvm-svn: 324603
* [x86] Add test/CodeGen/X86/vmaskmov-offset.ll. NFC.Alexander Ivchenko2018-02-081-0/+42
| | | | | | Needed for checking current code generation. llvm-svn: 324601
* [ARM] Fix disassembly of invalid banked register movesOliver Stannard2018-02-083-11/+35
| | | | | | | | | | | | | | | When disassembling banked register move instructions, we don't have an assembly syntax for the unallocated register numbers, so we have to return Fail rather than SoftFail. Previously we were returning SoftFail, then crashing in the InstPrinter as we have no way to represent these encodings in an assembly string. This also switches the decoder to use the table-generated list of banked registers, removing the duplicated list of encodings. Differential revision: https://reviews.llvm.org/D43066 llvm-svn: 324600
* [clangd] Update include guard in Annotations.h. NFCIlya Biryukov2018-02-081-2/+2
| | | | llvm-svn: 324599
* [test][dsymutil] Fix tests for Windows bots.Jonas Devlieghere2018-02-083-17/+2
| | | | | | | | | | The UNSUPPORTED directive was not honored by the bot, presumably because of the FIXME above it. This moves the comment down and removes the remaining update check from basic-linking-x86.test. This should un-break: llvm-clang-x86_64-expensive-checks-win/builds/7798/ llvm-svn: 324598
* Add missed PostDominatorTree analysis dependency to GVN hoist pass.Alexander Ivchenko2018-02-081-0/+1
| | | | | | | | | | | | | Summary: GVN hoist pass is using PostDominatorTree analysis, therefore the analysis should be listed in the pass initialization as a dependency. Reviewed By: sebpop Differential Revision: https://reviews.llvm.org/D43007 Author: ashlykov <arkady.shlykov@intel.com> llvm-svn: 324597
* [libcxx] Avoid spurious construction of valarray elementsMikhail Maltsev2018-02-085-21/+139
| | | | | | | | | | | | | | | | | | | | | Summary: Currently libc++ implements some operations on valarray by using the resize method. This method has a parameter with a default value. Because of this, valarray may spuriously construct and destruct objects of valarray's element type. This patch fixes this issue and adds corresponding test cases. Reviewers: EricWF, mclow.lists Reviewed By: mclow.lists Subscribers: rogfer01, cfe-commits Differential Revision: https://reviews.llvm.org/D41992 llvm-svn: 324596
* [X86][MC]: Adding test coverage of MC encoding for several small ↵Gadi Haber2018-02-0823-0/+1602
| | | | | | | | | | | | | | | | extensions.<NFC> NFC. Adding MC regressions tests to cover several small x86 extensions as follows: CLWB, CLZERO, F16C, INVPCID, PKU, POPCNT, RTM, SGX, SHA, SVM, VMFUNC, VTX This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952 Reviewers: RKSimon, craig.topper, zvi, AndreiGrischenko Differential Revision: https://reviews.llvm.org/D41388 Change-Id: I254508cd17faca00b780be0fc2abf6c71b61faab llvm-svn: 324595
* Fix for #31362 - ms_abi is implemented incorrectly for values >=16 bytes.Alexander Ivchenko2018-02-082-1/+24
| | | | | | | | | | | | | | | | Summary: This patch is a fix for following issue: https://bugs.llvm.org/show_bug.cgi?id=31362 The problem was caused by front end lowering C calling conventions without taking into account calling conventions enforced by attribute. In this case win64cc was no correctly lowered on targets other than Windows. Reviewed By: rnk (Reid Kleckner) Differential Revision: https://reviews.llvm.org/D43016 Author: belickim <mateusz.belicki@intel.com> llvm-svn: 324594
* [builtins] Workaround for infinite recursion in c?zdi2Jonas Devlieghere2018-02-082-0/+12
| | | | | | | | | | | gcc resolves `__builtin_c?z` to `__c?zdi2` which leads to infinite recursion. This problem has been observed for sparc64, mips64 and riscv. Presumably this happens whenever an arch without dedicated bit counting instructions is targeted. This patch provides a workaround. Differential revision: https://reviews.llvm.org/D42902 llvm-svn: 324593
* Re-land [dsymutil] Upstream update featureJonas Devlieghere2018-02-089-45/+362
| | | | | | | | | | This commit attempts to re-land the r324480 which was reverted in r324493 because it broke the Windows bots. For now I disabled the two update tests on Windows until I'm able to debug this. Differential revision: https://reviews.llvm.org/D42880 llvm-svn: 324592
* [clang-format] Do not break before long string literals in protosKrasimir Georgiev2018-02-085-7/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch is a follow-up to r323319 (which disables string literal breaking for text protos) and it disables breaking before long string literals. For example this: ``` keyyyyy: "long string literal" ``` used to get broken into: ``` keyyyyy: "long string literal" ``` While at it, I also enabled it for LK_Proto and fixed a bug in the mustBreak code. Reviewers: djasper, sammccall Reviewed By: djasper Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D42957 llvm-svn: 324591
* Rewrite the flaky test_restart_bug test in a more deterministic wayPavel Labath2018-02-083-88/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The test was trying to reproduce a bug in handling of two concurrent events, which was impossible to do reliably in a black-box style test. In practice, this meant the test was only ever failing on remote targets, as these were slow enough to trigger this. Fortunately, we now have the ability to mock the server side of the connection, which means we can simulate the failure deterministically, so I rewrite the test to use the new gdb-client framework. I've needed to add a couple of new packets to the mock server to be able to do this. Instead of trying to guess how a "typical" gdb-client test will want to handle this, I throw an exception in the implementation to force the user to override them (the packets are only sent if the test explicitly performs some action which will trigger them, so a basic test which e.g. does not need the "continue" functionality will not need to implement them). Reviewers: owenpshaw Subscribers: srhines, lldb-commits Differential Revision: https://reviews.llvm.org/D42959 llvm-svn: 324590
* [Loop Predication] Teach LP about reverse loops with uge and sge latch ↵Serguei Katkov2018-02-082-5/+113
| | | | | | | | | | | | | | conditions Add support of uge and sge latch condition to Loop Prediction for reverse loops. Reviewers: apilipenko, mkazantsev, sanjoy, anna Reviewed By: anna Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42837 llvm-svn: 324589
* [OMPT] Add tool_available_search testcaseJoachim Protze2018-02-081-0/+104
| | | | | | | | | | | | | | | | | | Tests the search for tools as defined in the spec. The OMP_TOOL_LIBRARIES environment variable contains paths to the following files(in that order) -to a nonexisting file -to a shared library that does not have a ompt_start_tool function -to a shared library that has an ompt_start_tool implementation returning NULL -to a shared library that has an ompt_start_tool implementation returning a pointer to a valid instance of ompt_start_tool_result_t The expected result is that the last tool gets active and can print in the thread-begin callback. Differential Revision: https://reviews.llvm.org/D42166 llvm-svn: 324588
* [OMPT] Add tool_not_available testcaseJoachim Protze2018-02-082-0/+69
| | | | | | | | | | | | Add a testcase that checks wheter the runtime can handle an ompt_start_tool method that returns NULL indicating that no tool shall be loaded. All tool_available testcases need a separate folder to avoid file conflicts for the generated tools. Differential Revision: https://reviews.llvm.org/D41904 llvm-svn: 324587
* [X86] Fix compilation of r324580.Clement Courbet2018-02-081-1/+1
| | | | | | @ctopper Can you check that the fix is correct ? llvm-svn: 324586
* Revert accidental changes that snuck in r324584Stefan Maksimovic2018-02-084-27/+1
| | | | llvm-svn: 324585
* [mips] Define certain instructions in microMIPS32r3Stefan Maksimovic2018-02-0837-254/+738
| | | | | | | | | | | | | | | | | | | | Instructions affected: mthc1, mfhc1, add.d, sub.d, mul.d, div.d, mov.d, neg.d, cvt.w.d, cvt.d.s, cvt.d.w, cvt.s.d These instructions are now defined for microMIPS32r3 + microMIPS32r6 in MicroMipsInstrFPU.td since they shared their encoding with those already defined in microMIPS32r6InstrInfo.td and have been therefore removed from the latter file. Some instructions present in MicroMipsInstrFPU.td which did not have both AFGR64 and FGR64 variants defined have been altered to do so. Differential revision: https://reviews.llvm.org/D42738 llvm-svn: 324584
* [AVR] Fix the testsuite after '%' changed to '$' in MIRDylan McKay2018-02-0840-119/+119
| | | | llvm-svn: 324583
* [TargetSchedule] Expose sub-units of a ProcResGroup in MCProcResourceDesc.Clement Courbet2018-02-083-5/+45
| | | | | | | | | | | | | | | | | | Summary: Right now using a ProcResource automatically counts as usage of all super ProcResGroups. All this is done during codegen, so there is no way for schedulers to get this information at runtime. This adds the information of which individual ProcRes units are contained in a ProcResGroup in MCProcResourceDesc. Reviewers: gchatelet Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43023 llvm-svn: 324582
* [AArch64] Don't materialize 0 with "fmov h0, .." when FullFP16 is not supportedSjoerd Meijer2018-02-083-7/+11
| | | | | | | | | | | | | | We were generating "fmov h0, wzr" instructions when FullFP16 is not enabled. I've not added any tests, because the problem was visible in: test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll, which I had to change: I don't think Cyclone has FullFP16 enabled by default, so it shouldn't be using this v8.2a instruction. I've also removed these rdar tags, please shout if there are any objections. Differential Revision: https://reviews.llvm.org/D43020 llvm-svn: 324581
* [X86] Support folding in a k-register OR when creating KORTEST from scalar ↵Craig Topper2018-02-083-18/+18
| | | | | | | | compare of a bitcast from vXi1. This should allow us to remove the kortest intrinsic from IR and use compare+bitcast+or in IR instead. llvm-svn: 324580
* [X86] Allow KORTEST instruction to be used for testing if a mask is all onesCraig Topper2018-02-084-17/+49
| | | | | | | | The KTEST instruction sets the C flag if the result of anding both operands together is all 1s. We can use this to lower (icmp eq/ne (bitcast (vXi1 X), -1) Differential Revision: https://reviews.llvm.org/D42772 llvm-svn: 324577
* [X86] Don't emit KTEST instructions unless only the Z flag is being usedCraig Topper2018-02-084-57/+152
| | | | | | | | | | | | | | | | | | | | | | | Summary: KTEST has weird flag behavior. The Z flag is set for all bits in the AND of the k-registers being 0, and the C flag is set for all bits being 1. All other flags are cleared. We currently emit this instruction in EmitTEST and don't check the condition code. This can lead to strange things like using the S flag after a KTEST for a signed compare. The domain reassignment pass can also transform TEST instructions into KTEST and is not protected against the flag usage either. For now I've disabled this part of the domain reassignment pass. I tried to comment out the checks in the mir test so that we could recover them later, but I couldn't figure out how to get that to work. This patch moves the KTEST handling into LowerSETCC and now creates a ktest+x86setcc. I've chosen this approach because I'd like to add support for the C flag for all ones in a followup patch. To do that requires that I can rewrite the condition code going in the x86setcc to be different than the original SETCC condition code. This fixes PR36182. I'll file a PR to fix domain reassignment once this goes in. Should this be merged to 6.0? Reviewers: spatel, guyblank, RKSimon, zvi Reviewed By: guyblank Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42770 llvm-svn: 324576
* Resubmit "[clangd] The new threading implementation"Ilya Biryukov2018-02-0814-349/+557
| | | | | | | | | | | Initially submitted as r324356 and reverted in r324386. This change additionally contains a fix to crashes of the buildbots. The source of the crash was undefined behaviour caused by std::future<> whose std::promise<> was destroyed without calling set_value(). llvm-svn: 324575
* Recommit r324455 "[ThinLTO] - Simplify code in ThinLTOBitcodeWriter."George Rimar2018-02-081-40/+12
| | | | | | | | | | | | | With fix: reimplemented. Original commit message: Recently introduced convertToDeclaration is very similar to code used in filterModule function. Patch reuses it to reduce duplication. Differential revision: https://reviews.llvm.org/D42971 llvm-svn: 324574
* Temporarily comment out deduction guide tests while I figure out what to do ↵Marshall Clow2018-02-082-0/+3
| | | | | | with old bots llvm-svn: 324573
* [SimplifyCFG] Re-apply Relax restriction for folding unconditional branchesSerguei Katkov2018-02-085-13/+29
| | | | | | | | | | | | | | | | | | | | | The commit rL308422 introduces a restriction for folding unconditional branches. Specifically if empty block with unconditional branch leads to header of the loop then elimination of this basic block is prohibited. However it seems this condition is redundantly strict. If elimination of this basic block does not introduce more back edges then we can eliminate this block. The patch implements this relax of restriction. The test profile/Linux/counter_promo_nest.c in compiler-rt project is updated to meet this change. Reviewers: efriedma, mcrosier, pacxx, hsung, davidxl Reviewed By: pacxx Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42691 llvm-svn: 324572
* Update test counter_promo_nest.c to meet llvm changeSerguei Katkov2018-02-081-0/+3
| | | | | | | | | | | | | | | | | The test expects to see the pattern "load add store" twice in a row. However the test contains actually several instances of this pattern. Currently the first pattern appears in the output twice. But after LLVM change https://reviews.llvm.org/D42691 some addtional modification is done and one of another pattern has been hoisted in function entry block. As a result we have another order of meeting this pattern. The test is updated to meet this change. llvm-svn: 324571
* CMAKE: apply -O3 for mingw clangMartell Malone2018-02-081-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D41596 llvm-svn: 324570
* Implement deduction guide for basic_string as described in P0433Marshall Clow2018-02-084-2/+132
| | | | llvm-svn: 324569
* [DAGCombiner] Fix a couple mistakes from r324311 by really passing the ↵Craig Topper2018-02-081-2/+4
| | | | | | | | | | original load to ExtendSetCCUses. We're passing the binary op that uses the load instead of the load. Noticed by inspection. Not sure how to test this because this just prevents the introduction of an extend that will later be truncated and will probably be combined out. llvm-svn: 324568
* [DAGCombiner] Don't create truncate nodes in (aext (zextload x)) -> ↵Craig Topper2018-02-081-15/+5
| | | | | | | | (zextload x) and similar folds. NFCI The truncate is being used to replace other users of of the load, but we checked that the load only has one use so there are no other uses to replace. llvm-svn: 324567
* Improve a test. NFCMarshall Clow2018-02-081-0/+1
| | | | llvm-svn: 324566
* ARM: Remove dead code. NFCI.Peter Collingbourne2018-02-082-6/+0
| | | | llvm-svn: 324565
* [docs] Update docs for cmake options LLDB_TEST_C_COMPILER and ↵Aaron Smith2018-02-082-6/+6
| | | | | | | | | | | | | | | | LLDB_TEST_CXX_COMPILER Summary: LLDB_TEST_COMPILER is not a valid option for CMake for LLDB. There are instead two properties LLDB_TEST_C_COMPILER and LLDB_TEST_CXX_COMPILER. Update the documents accordingly to reflect the correct information. Reviewers: zturner, lldb-commits Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43061 llvm-svn: 324564
* [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug outputFrancis Visoiu Mistrih2018-02-0812-47/+67
| | | | | | | | | | | | | | Instead of: %bb.1: derived from LLVM BB %for.body print: bb.1.for.body: Also use MIR syntax for MBB attributes like "align", "landing-pad", etc. llvm-svn: 324563
* [DAGCombiner] Avoid creating truncate nodes in (zext (and (load)))->(and ↵Craig Topper2018-02-081-22/+25
| | | | | | | | (zextload)) fold until we know for sure we're going to need it. NFCI The truncate is only needed if the load has additional users. It used to get passed to extendSetCCUses so was created early, but that's no longer the case. llvm-svn: 324562
* [DAGCombiner] Rename variable to be slightly better. NFCCraig Topper2018-02-081-21/+21
| | | | | | We were calling a load LN0 but it came from N0.getOperand(0) so its really more like LN00 if we follow the name used in other places. llvm-svn: 324561
* bpf: Improve expanding logic in LowerSELECT_CCYonghong Song2018-02-083-1/+31
| | | | | | | | | | | | | | | LowerSELECT_CC is not generating optimal Select_Ri pattern at the moment. It is not guaranteed to place ConstantNode at RHS which would miss matching Select_Ri. A new testcase added into the existing select_ri.ll, also there is an existing case in cmp.ll which would be improved to use Select_Ri after this patch, it is adjusted accordingly. Reported-by: Alexei Starovoitov <alexei.starovoitov@gmail.com> Reviewed-by: Yonghong Song <yhs@fb.com> Signed-off-by: Jiong Wang <jiong.wang@netronome.com> llvm-svn: 324560
* Symbols defined in linker scripts should not have dso_local flag set in LTO ↵Dmitry Mikulin2018-02-082-3/+7
| | | | | | | | resolutions. Differential Revision: https://reviews.llvm.org/D43051 llvm-svn: 324559
* Deactivate TestTargetSymbolsBuildidCase if host is windowsEugene Zemtsov2018-02-082-1/+2
| | | | | | Makefile has unix magic and thus not working on windows. llvm-svn: 324558
* gold-plugin: Do not set codegen opt level based on LTO opt level.Peter Collingbourne2018-02-081-15/+0
| | | | | | | | | | | The LTO opt level should not affect the codegen opt level, and indeed it does not affect it in lld. Ideally the codegen opt level should be controlled by an IR-level attribute based on the compile-time opt level, but that hasn't been implemented yet. Differential Revision: https://reviews.llvm.org/D43040 llvm-svn: 324557
* Add space inside the regular expression.Rafael Espindola2018-02-081-1/+1
| | | | | | This should now pass on both ppc and x86. Sorry about the noise. llvm-svn: 324556
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