diff options
| author | Dylan McKay <me@dylanmckay.io> | 2018-02-08 09:17:11 +0000 |
|---|---|---|
| committer | Dylan McKay <me@dylanmckay.io> | 2018-02-08 09:17:11 +0000 |
| commit | 820553fdb1e0cb49ac99a66bc5fd078283bb1a60 (patch) | |
| tree | fd94dfed0bba22e8e4299a7753fad097c3fb374d | |
| parent | 39911e2ee6c03086ea23dd58d5fdc95d137e1b6f (diff) | |
| download | bcm5719-llvm-820553fdb1e0cb49ac99a66bc5fd078283bb1a60.tar.gz bcm5719-llvm-820553fdb1e0cb49ac99a66bc5fd078283bb1a60.zip | |
[AVR] Fix the testsuite after '%' changed to '$' in MIR
llvm-svn: 324583
40 files changed, 119 insertions, 119 deletions
diff --git a/llvm/test/CodeGen/AVR/pseudo/ADCWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/ADCWRdRr.mir index b1fc792d659..aa10f6a95e4 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ADCWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ADCWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_adcwrdrr - ; CHECK: %r14 = ADCRdRr %r14, %r20, implicit-def %sreg, implicit %sreg - ; CHECK-LABEL: %r15 = ADCRdRr %r15, %r21, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r14 = ADCRdRr $r14, $r20, implicit-def $sreg, implicit $sreg + ; CHECK-LABEL: $r15 = ADCRdRr $r15, $r21, implicit-def $sreg, implicit killed $sreg - %r15r14 = ADCWRdRr %r15r14, %r21r20, implicit-def %sreg, implicit %sreg + $r15r14 = ADCWRdRr $r15r14, $r21r20, implicit-def $sreg, implicit $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/ADDWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/ADDWRdRr.mir index 5743b153633..a8cd4b42506 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ADDWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ADDWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_addwrdrr - ; CHECK: %r14 = ADDRdRr %r14, %r20, implicit-def %sreg - ; CHECK-LABEL: %r15 = ADCRdRr %r15, %r21, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r14 = ADDRdRr $r14, $r20, implicit-def $sreg + ; CHECK-LABEL: $r15 = ADCRdRr $r15, $r21, implicit-def $sreg, implicit killed $sreg - %r15r14 = ADDWRdRr %r15r14, %r21r20, implicit-def %sreg + $r15r14 = ADDWRdRr $r15r14, $r21r20, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/ANDIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/ANDIWRdK.mir index 4d58c85f4f2..340c7c3d7c4 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ANDIWRdK.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ANDIWRdK.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_andiwrdrr - ; CHECK: %r16 = ANDIRdK %r16, 175, implicit-def dead %sreg - ; CHECK-NEXT: %r17 = ANDIRdK %r17, 250, implicit-def %sreg + ; CHECK: $r16 = ANDIRdK $r16, 175, implicit-def dead $sreg + ; CHECK-NEXT: $r17 = ANDIRdK $r17, 250, implicit-def $sreg - %r17r16 = ANDIWRdK %r17r16, 64175, implicit-def %sreg + $r17r16 = ANDIWRdK $r17r16, 64175, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/ANDWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/ANDWRdRr.mir index f6b060a5d73..b3bc6a80067 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ANDWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ANDWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_andwrdrr - ; CHECK: %r14 = ANDRdRr %r14, %r20, implicit-def dead %sreg - ; CHECK-NEXT: %r15 = ANDRdRr %r15, %r21, implicit-def %sreg + ; CHECK: $r14 = ANDRdRr $r14, $r20, implicit-def dead $sreg + ; CHECK-NEXT: $r15 = ANDRdRr $r15, $r21, implicit-def $sreg - %r15r14 = ANDWRdRr %r15r14, %r21r20, implicit-def %sreg + $r15r14 = ANDWRdRr $r15r14, $r21r20, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/ASRWRd.mir b/llvm/test/CodeGen/AVR/pseudo/ASRWRd.mir index 5253dcd87f1..e364d810876 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ASRWRd.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ASRWRd.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: %r15 = ASRRd %r15, implicit-def %sreg - ; CHECK-NEXT: %r14 = RORRd %r14, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r15 = ASRRd $r15, implicit-def $sreg + ; CHECK-NEXT: $r14 = RORRd $r14, implicit-def $sreg, implicit killed $sreg - %r15r14 = ASRWRd %r15r14, implicit-def %sreg + $r15r14 = ASRWRd $r15r14, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/COMWRd.mir b/llvm/test/CodeGen/AVR/pseudo/COMWRd.mir index db68a4082b7..4718d7d1613 100644 --- a/llvm/test/CodeGen/AVR/pseudo/COMWRd.mir +++ b/llvm/test/CodeGen/AVR/pseudo/COMWRd.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_comwrd - ; CHECK: %r14 = COMRd %r14, implicit-def dead %sreg - ; CHECK-NEXT: %r15 = COMRd %r15, implicit-def %sreg + ; CHECK: $r14 = COMRd $r14, implicit-def dead $sreg + ; CHECK-NEXT: $r15 = COMRd $r15, implicit-def $sreg - %r15r14 = COMWRd %r15r14, implicit-def %sreg + $r15r14 = COMWRd $r15r14, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/CPCWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/CPCWRdRr.mir index c0ab60e8929..2ed3d10acef 100644 --- a/llvm/test/CodeGen/AVR/pseudo/CPCWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/CPCWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_cpcwrdrr - ; CHECK: CPCRdRr %r20, %r22, implicit-def %sreg, implicit killed %sreg - ; CHECK-NEXT: CPCRdRr %r21, %r23, implicit-def %sreg, implicit killed %sreg + ; CHECK: CPCRdRr $r20, $r22, implicit-def $sreg, implicit killed $sreg + ; CHECK-NEXT: CPCRdRr $r21, $r23, implicit-def $sreg, implicit killed $sreg - CPCWRdRr %r21r20, %r23r22, implicit-def %sreg, implicit %sreg + CPCWRdRr $r21r20, $r23r22, implicit-def $sreg, implicit $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/CPWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/CPWRdRr.mir index c93c99151a4..62069a770b4 100644 --- a/llvm/test/CodeGen/AVR/pseudo/CPWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/CPWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_cpwrdrr - ; CHECK: CPRdRr %r14, %r20, implicit-def %sreg - ; CHECK-NEXT: CPCRdRr %r15, %r21, implicit-def %sreg, implicit killed %sreg + ; CHECK: CPRdRr $r14, $r20, implicit-def $sreg + ; CHECK-NEXT: CPCRdRr $r15, $r21, implicit-def $sreg, implicit killed $sreg - CPWRdRr %r15r14, %r21r20, implicit-def %sreg + CPWRdRr $r15r14, $r21r20, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/EORWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/EORWRdRr.mir index de53c2d077e..3ff829ae1f6 100644 --- a/llvm/test/CodeGen/AVR/pseudo/EORWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/EORWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_eorwrdrr - ; CHECK: %r14 = EORRdRr %r14, %r20, implicit-def dead %sreg - ; CHECK-NEXT: %r15 = EORRdRr %r15, %r21, implicit-def %sreg + ; CHECK: $r14 = EORRdRr $r14, $r20, implicit-def dead $sreg + ; CHECK-NEXT: $r15 = EORRdRr $r15, $r21, implicit-def $sreg - %r15r14 = EORWRdRr %r15r14, %r21r20, implicit-def %sreg + $r15r14 = EORWRdRr $r15r14, $r21r20, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/FRMIDX.mir b/llvm/test/CodeGen/AVR/pseudo/FRMIDX.mir index b56122a43ad..8815802261e 100644 --- a/llvm/test/CodeGen/AVR/pseudo/FRMIDX.mir +++ b/llvm/test/CodeGen/AVR/pseudo/FRMIDX.mir @@ -21,5 +21,5 @@ body: | ; CHECK-LABEL: test - %r29r28 = FRMIDX %r31r30, 0, implicit-def %sreg + $r29r28 = FRMIDX $r31r30, 0, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/INWRdA.mir b/llvm/test/CodeGen/AVR/pseudo/INWRdA.mir index 1b2d7fa0f53..e1f66827652 100644 --- a/llvm/test/CodeGen/AVR/pseudo/INWRdA.mir +++ b/llvm/test/CodeGen/AVR/pseudo/INWRdA.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: %r14 = INRdA 31 - ; CHECK-NEXT: %r15 = INRdA 32 + ; CHECK: $r14 = INRdA 31 + ; CHECK-NEXT: $r15 = INRdA 32 - %r15r14 = INWRdA 31 + $r15r14 = INWRdA 31 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ-same-src-dst.mir b/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ-same-src-dst.mir index b19e44e29fb..df69f5fffa5 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ-same-src-dst.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ-same-src-dst.mir @@ -31,5 +31,5 @@ body: | ; CHECK-NEXT: mov r31, [[SCRATCH]] ; CHECK-NEXT: pop r30 - early-clobber %r31r30 = LDDWRdPtrQ undef %r31r30, 10 + early-clobber $r31r30 = LDDWRdPtrQ undef $r31r30, 10 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir b/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir index 5ff2ef1742e..59b3ce8b602 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir @@ -21,5 +21,5 @@ body: | ; CHECK: ldd r30, Y+10 ; CHECK-NEXT: ldd r31, Y+11 - early-clobber %r31r30 = LDDWRdPtrQ undef %r29r28, 10 + early-clobber $r31r30 = LDDWRdPtrQ undef $r29r28, 10 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDDWRdYQ.mir b/llvm/test/CodeGen/AVR/pseudo/LDDWRdYQ.mir index 831c75b38b1..7875cfd5c56 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDDWRdYQ.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDDWRdYQ.mir @@ -21,5 +21,5 @@ body: | ; CHECK: ldd r30, Y+1 ; CHECK-NEXT: ldd r31, Y+2 - early-clobber %r31r30 = LDDWRdYQ undef %r29r28, 1 + early-clobber $r31r30 = LDDWRdYQ undef $r29r28, 1 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/LDIWRdK.mir index f4788adf20b..677a49e9384 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDIWRdK.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDIWRdK.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_ldiwrdrr - ; CHECK: %r30 = LDIRdK 255 - ; CHECK-NEXT: %r31 = LDIRdK 9 + ; CHECK: $r30 = LDIRdK 255 + ; CHECK-NEXT: $r31 = LDIRdK 9 - %r31r30 = LDIWRdK 2559 + $r31r30 = LDIWRdK 2559 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDSWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/LDSWRdK.mir index b813923abcb..f11c656330e 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDSWRdK.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDSWRdK.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_ldswrdrr - ; CHECK: %r30 = LDSRdK 2559 - ; CHECK-NEXT: %r31 = LDSRdK 2560 + ; CHECK: $r30 = LDSRdK 2559 + ; CHECK-NEXT: $r31 = LDSRdK 2560 - %r31r30 = LDSWRdK 2559 + $r31r30 = LDSWRdK 2559 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir b/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir index 82f1a9a832f..4fc97f63d95 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir @@ -24,6 +24,6 @@ body: | ; CHECK-NEXT: mov r31, [[SCRATCH]] ; CHECK-NEXT: pop r30 - early-clobber %r31r30 = LDWRdPtr undef %r31r30 + early-clobber $r31r30 = LDWRdPtr undef $r31r30 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir b/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir index 3a3ec3c2657..5398a8b1a98 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDWRdPtr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_ldwrdptr - ; CHECK: %r0, %r31r30 = LDRdPtrPi %r31r30 - ; CHECK-NEXT: %r1 = LDRdPtr %r31r30 + ; CHECK: $r0, $r31r30 = LDRdPtrPi $r31r30 + ; CHECK-NEXT: $r1 = LDRdPtr $r31r30 - %r1r0 = LDWRdPtr %r31r30 + $r1r0 = LDWRdPtr $r31r30 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDWRdPtrPd.mir b/llvm/test/CodeGen/AVR/pseudo/LDWRdPtrPd.mir index 0c065f83d9a..39abc4590b3 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDWRdPtrPd.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDWRdPtrPd.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_ldwrdptrpd - ; CHECK: early-clobber %r1, %r31r30 = LDRdPtrPd killed %r31r30 - ; CHECK-NEXT: early-clobber %r0, %r31r30 = LDRdPtrPd killed %r31r30 + ; CHECK: early-clobber $r1, $r31r30 = LDRdPtrPd killed $r31r30 + ; CHECK-NEXT: early-clobber $r0, $r31r30 = LDRdPtrPd killed $r31r30 - %r1r0, %r31r30 = LDWRdPtrPd %r31r30 + $r1r0, $r31r30 = LDWRdPtrPd $r31r30 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LDWRdPtrPi.mir b/llvm/test/CodeGen/AVR/pseudo/LDWRdPtrPi.mir index a947d48d0ba..42c255a4da9 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LDWRdPtrPi.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LDWRdPtrPi.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_ldwrdptrpi - ; CHECK: early-clobber %r0, %r31r30 = LDRdPtrPi killed %r31r30 - ; CHECK-NEXT: early-clobber %r1, %r31r30 = LDRdPtrPi killed %r31r30 + ; CHECK: early-clobber $r0, $r31r30 = LDRdPtrPi killed $r31r30 + ; CHECK-NEXT: early-clobber $r1, $r31r30 = LDRdPtrPi killed $r31r30 - %r1r0, %r31r30 = LDWRdPtrPi %r31r30 + $r1r0, $r31r30 = LDWRdPtrPi $r31r30 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir b/llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir index 537944866e5..5eccebbb477 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: %r14 = LSLRd %r14, implicit-def %sreg - ; CHECK-NEXT: %r15 = ROLRd %r15, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r14 = LSLRd $r14, implicit-def $sreg + ; CHECK-NEXT: $r15 = ROLRd $r15, implicit-def $sreg, implicit killed $sreg - %r15r14 = LSLWRd %r15r14, implicit-def %sreg + $r15r14 = LSLWRd $r15r14, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/LSRWRd.mir b/llvm/test/CodeGen/AVR/pseudo/LSRWRd.mir index a1a513f4e36..d3bee8bb2f5 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LSRWRd.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LSRWRd.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: %r15 = LSRRd %r15, implicit-def %sreg - ; CHECK-NEXT: %r14 = RORRd %r14, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r15 = LSRRd $r15, implicit-def $sreg + ; CHECK-NEXT: $r14 = RORRd $r14, implicit-def $sreg, implicit killed $sreg - %r15r14 = LSRWRd %r15r14, implicit-def %sreg + $r15r14 = LSRWRd $r15r14, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/ORIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/ORIWRdK.mir index eaa12842df4..568f8b99215 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ORIWRdK.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ORIWRdK.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_oriwrdrr - ; CHECK: %r20 = ORIRdK %r20, 175, implicit-def dead %sreg - ; CHECK-NEXT: %r21 = ORIRdK %r21, 250, implicit-def %sreg + ; CHECK: $r20 = ORIRdK $r20, 175, implicit-def dead $sreg + ; CHECK-NEXT: $r21 = ORIRdK $r21, 250, implicit-def $sreg - %r21r20 = ORIWRdK %r21r20, 64175, implicit-def %sreg + $r21r20 = ORIWRdK $r21r20, 64175, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/ORWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/ORWRdRr.mir index 834c21cba8f..6f4167b99bf 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ORWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ORWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_orwrdrr - ; CHECK: %r14 = ORRdRr %r14, %r20, implicit-def dead %sreg - ; CHECK-NEXT: %r15 = ORRdRr %r15, %r21, implicit-def %sreg + ; CHECK: $r14 = ORRdRr $r14, $r20, implicit-def dead $sreg + ; CHECK-NEXT: $r15 = ORRdRr $r15, $r21, implicit-def $sreg - %r15r14 = ORWRdRr %r15r14, %r21r20, implicit-def %sreg + $r15r14 = ORWRdRr $r15r14, $r21r20, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/OUTWARr.mir b/llvm/test/CodeGen/AVR/pseudo/OUTWARr.mir index 99abad1c31b..53ed8cc3979 100644 --- a/llvm/test/CodeGen/AVR/pseudo/OUTWARr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/OUTWARr.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: OUTARr 32, %r15 - ; CHECK-NEXT: OUTARr 31, %r14 + ; CHECK: OUTARr 32, $r15 + ; CHECK-NEXT: OUTARr 31, $r14 - OUTWARr 31, %r15r14 + OUTWARr 31, $r15r14 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/POPWRd.mir b/llvm/test/CodeGen/AVR/pseudo/POPWRd.mir index 8bd7fe68727..ceb0ea8e714 100644 --- a/llvm/test/CodeGen/AVR/pseudo/POPWRd.mir +++ b/llvm/test/CodeGen/AVR/pseudo/POPWRd.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: %r29 = POPRd implicit-def %sp, implicit %sp - ; CHECK-LABEL: %r28 = POPRd implicit-def %sp, implicit %sp + ; CHECK: $r29 = POPRd implicit-def $sp, implicit $sp + ; CHECK-LABEL: $r28 = POPRd implicit-def $sp, implicit $sp - %r29r28 = POPWRd implicit-def %sp, implicit %sp + $r29r28 = POPWRd implicit-def $sp, implicit $sp ... diff --git a/llvm/test/CodeGen/AVR/pseudo/PUSHWRr.mir b/llvm/test/CodeGen/AVR/pseudo/PUSHWRr.mir index ec94ecbf5bb..847313089ed 100644 --- a/llvm/test/CodeGen/AVR/pseudo/PUSHWRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/PUSHWRr.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: PUSHRr %r28, implicit-def %sp, implicit %sp - ; CHECK-NEXT: PUSHRr %r29, implicit-def %sp, implicit %sp + ; CHECK: PUSHRr $r28, implicit-def $sp, implicit $sp + ; CHECK-NEXT: PUSHRr $r29, implicit-def $sp, implicit $sp - PUSHWRr %r29r28, implicit-def %sp, implicit %sp + PUSHWRr $r29r28, implicit-def $sp, implicit $sp ... diff --git a/llvm/test/CodeGen/AVR/pseudo/SBCIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/SBCIWRdK.mir index a92f6951798..8b8c4627010 100644 --- a/llvm/test/CodeGen/AVR/pseudo/SBCIWRdK.mir +++ b/llvm/test/CodeGen/AVR/pseudo/SBCIWRdK.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_sbciwrdk - ; CHECK: %r20 = SBCIRdK %r20, 175, implicit-def %sreg, implicit killed %sreg - ; CHECK-NEXT: %r21 = SBCIRdK %r21, 250, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r20 = SBCIRdK $r20, 175, implicit-def $sreg, implicit killed $sreg + ; CHECK-NEXT: $r21 = SBCIRdK $r21, 250, implicit-def $sreg, implicit killed $sreg - %r21r20 = SBCIWRdK %r21r20, 64175, implicit-def %sreg, implicit %sreg + $r21r20 = SBCIWRdK $r21r20, 64175, implicit-def $sreg, implicit $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/SBCWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/SBCWRdRr.mir index 5cf5d33252c..9fbc6def80b 100644 --- a/llvm/test/CodeGen/AVR/pseudo/SBCWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/SBCWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_sbcwrdrr - ; CHECK: %r14 = SBCRdRr %r14, %r20, implicit-def %sreg - ; CHECK-NEXT: %r15 = SBCRdRr %r15, %r21, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r14 = SBCRdRr $r14, $r20, implicit-def $sreg + ; CHECK-NEXT: $r15 = SBCRdRr $r15, $r21, implicit-def $sreg, implicit killed $sreg - %r15r14 = SBCWRdRr %r15r14, %r21r20, implicit-def %sreg, implicit %sreg + $r15r14 = SBCWRdRr $r15r14, $r21r20, implicit-def $sreg, implicit $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/SEXT.mir b/llvm/test/CodeGen/AVR/pseudo/SEXT.mir index 0d10358c10e..116ea21a3b8 100644 --- a/llvm/test/CodeGen/AVR/pseudo/SEXT.mir +++ b/llvm/test/CodeGen/AVR/pseudo/SEXT.mir @@ -15,10 +15,10 @@ body: | ; CHECK-LABEL: test - ; CHECK: %r14 = MOVRdRr %r31 - ; CHECK-NEXT: %r15 = MOVRdRr %r31 - ; CHECK-NEXT: %r15 = LSLRd killed %r15, implicit-def %sreg - ; CHECK-NEXT: %r15 = SBCRdRr killed %r15, killed %r15, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r14 = MOVRdRr $r31 + ; CHECK-NEXT: $r15 = MOVRdRr $r31 + ; CHECK-NEXT: $r15 = LSLRd killed $r15, implicit-def $sreg + ; CHECK-NEXT: $r15 = SBCRdRr killed $r15, killed $r15, implicit-def $sreg, implicit killed $sreg - %r15r14 = SEXT %r31, implicit-def %sreg + $r15r14 = SEXT $r31, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir b/llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir index 9252997d489..8c06bf8214e 100644 --- a/llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: STDPtrQRr %r29r28, 10, %r0 - ; CHECK-NEXT: STDPtrQRr %r29r28, 11, %r1 + ; CHECK: STDPtrQRr $r29r28, 10, $r0 + ; CHECK-NEXT: STDPtrQRr $r29r28, 11, $r1 - STDWPtrQRr %r29r28, 10, %r1r0 + STDWPtrQRr $r29r28, 10, $r1r0 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/STSWKRr.mir b/llvm/test/CodeGen/AVR/pseudo/STSWKRr.mir index 18f10180809..9302f15800a 100644 --- a/llvm/test/CodeGen/AVR/pseudo/STSWKRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/STSWKRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_stswkrr - ; CHECK: STSKRr 2560, %r31 - ; CHECK-NEXT: STSKRr 2559, %r30 + ; CHECK: STSKRr 2560, $r31 + ; CHECK-NEXT: STSKRr 2559, $r30 - STSWKRr 2559, %r31r30 + STSWKRr 2559, $r31r30 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/STWPtrPdRr.mir b/llvm/test/CodeGen/AVR/pseudo/STWPtrPdRr.mir index d884d2121c2..c8a5eba7df6 100644 --- a/llvm/test/CodeGen/AVR/pseudo/STWPtrPdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/STWPtrPdRr.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: early-clobber %r31r30 = STPtrPdRr killed %r31r30, %r29, 52 - ; CHECK-NEXT: early-clobber %r31r30 = STPtrPdRr killed %r31r30, %r28, 52 + ; CHECK: early-clobber $r31r30 = STPtrPdRr killed $r31r30, $r29, 52 + ; CHECK-NEXT: early-clobber $r31r30 = STPtrPdRr killed $r31r30, $r28, 52 - %r31r30 = STWPtrPdRr %r31r30, %r29r28, 52 + $r31r30 = STWPtrPdRr $r31r30, $r29r28, 52 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/STWPtrPiRr.mir b/llvm/test/CodeGen/AVR/pseudo/STWPtrPiRr.mir index 962776aa633..3d65cab9bb5 100644 --- a/llvm/test/CodeGen/AVR/pseudo/STWPtrPiRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/STWPtrPiRr.mir @@ -15,8 +15,8 @@ body: | ; CHECK-LABEL: test - ; CHECK: early-clobber %r31r30 = STPtrPiRr killed %r31r30, %r28, 52 - ; CHECK-NEXT: early-clobber %r31r30 = STPtrPiRr killed %r31r30, %r29, 52 + ; CHECK: early-clobber $r31r30 = STPtrPiRr killed $r31r30, $r28, 52 + ; CHECK-NEXT: early-clobber $r31r30 = STPtrPiRr killed $r31r30, $r29, 52 - %r31r30 = STWPtrPiRr %r31r30, %r29r28, 52 + $r31r30 = STWPtrPiRr $r31r30, $r29r28, 52 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/STWPtrRr.mir b/llvm/test/CodeGen/AVR/pseudo/STWPtrRr.mir index efed707bfe8..3ed4a50b80b 100644 --- a/llvm/test/CodeGen/AVR/pseudo/STWPtrRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/STWPtrRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_stwptrrr - ; CHECK: STPtrRr %r31r30, %r16 - ; CHECK-NEXT: STDPtrQRr %r31r30, 1, %r17 + ; CHECK: STPtrRr $r31r30, $r16 + ; CHECK-NEXT: STDPtrQRr $r31r30, 1, $r17 - STWPtrRr %r31r30, %r17r16 + STWPtrRr $r31r30, $r17r16 ... diff --git a/llvm/test/CodeGen/AVR/pseudo/SUBIWRdK.mir b/llvm/test/CodeGen/AVR/pseudo/SUBIWRdK.mir index 38ff880a517..3ea833fd2fa 100644 --- a/llvm/test/CodeGen/AVR/pseudo/SUBIWRdK.mir +++ b/llvm/test/CodeGen/AVR/pseudo/SUBIWRdK.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_subiwrdrr - ; CHECK: %r20 = SUBIRdK %r20, 175, implicit-def %sreg - ; CHECK-NEXT: %r21 = SBCIRdK %r21, 250, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r20 = SUBIRdK $r20, 175, implicit-def $sreg + ; CHECK-NEXT: $r21 = SBCIRdK $r21, 250, implicit-def $sreg, implicit killed $sreg - %r21r20 = SUBIWRdK %r21r20, 64175, implicit-def %sreg + $r21r20 = SUBIWRdK $r21r20, 64175, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/SUBWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/SUBWRdRr.mir index b12b0e5349e..85036464be5 100644 --- a/llvm/test/CodeGen/AVR/pseudo/SUBWRdRr.mir +++ b/llvm/test/CodeGen/AVR/pseudo/SUBWRdRr.mir @@ -17,8 +17,8 @@ body: | ; CHECK-LABEL: test_subwrdrr - ; CHECK: %r14 = SUBRdRr %r14, %r20, implicit-def %sreg - ; CHECK-NEXT: %r15 = SBCRdRr %r15, %r21, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r14 = SUBRdRr $r14, $r20, implicit-def $sreg + ; CHECK-NEXT: $r15 = SBCRdRr $r15, $r21, implicit-def $sreg, implicit killed $sreg - %r15r14 = SUBWRdRr %r15r14, %r21r20, implicit-def %sreg + $r15r14 = SUBWRdRr $r15r14, $r21r20, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/pseudo/ZEXT.mir b/llvm/test/CodeGen/AVR/pseudo/ZEXT.mir index 0d10358c10e..116ea21a3b8 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ZEXT.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ZEXT.mir @@ -15,10 +15,10 @@ body: | ; CHECK-LABEL: test - ; CHECK: %r14 = MOVRdRr %r31 - ; CHECK-NEXT: %r15 = MOVRdRr %r31 - ; CHECK-NEXT: %r15 = LSLRd killed %r15, implicit-def %sreg - ; CHECK-NEXT: %r15 = SBCRdRr killed %r15, killed %r15, implicit-def %sreg, implicit killed %sreg + ; CHECK: $r14 = MOVRdRr $r31 + ; CHECK-NEXT: $r15 = MOVRdRr $r31 + ; CHECK-NEXT: $r15 = LSLRd killed $r15, implicit-def $sreg + ; CHECK-NEXT: $r15 = SBCRdRr killed $r15, killed $r15, implicit-def $sreg, implicit killed $sreg - %r15r14 = SEXT %r31, implicit-def %sreg + $r15r14 = SEXT $r31, implicit-def $sreg ... diff --git a/llvm/test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir b/llvm/test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir index 7421bd4c4e8..b97c6d3be25 100644 --- a/llvm/test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir +++ b/llvm/test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir @@ -16,16 +16,16 @@ body: | ; CHECK-LABEL: test ; We shouldn't expand things which already have 6-bit imms. - ; CHECK: STDWPtrQRr %r29r28, 63, %r1r0 - STDWPtrQRr %r29r28, 63, %r1r0 + ; CHECK: STDWPtrQRr $r29r28, 63, $r1r0 + STDWPtrQRr $r29r28, 63, $r1r0 ; We shouldn't expand things which already have 6-bit imms. - ; CHECK-NEXT: STDWPtrQRr %r29r28, 0, %r1r0 - STDWPtrQRr %r29r28, 0, %r1r0 + ; CHECK-NEXT: STDWPtrQRr $r29r28, 0, $r1r0 + STDWPtrQRr $r29r28, 0, $r1r0 - ; CHECK-NEXT: PUSHWRr %r29r28, implicit-def %sp, implicit %sp - ; CHECK-NEXT: %r29r28 = SBCIWRdK %r29r28, -64, implicit-def %sreg, implicit %sreg - ; CHECK-NEXT: STWPtrRr %r29r28, %r1r0 - ; CHECK-NEXT: POPWRd %r29r28, implicit-def %sp, implicit %sp - STDWPtrQRr %r29r28, 64, %r1r0 + ; CHECK-NEXT: PUSHWRr $r29r28, implicit-def $sp, implicit $sp + ; CHECK-NEXT: $r29r28 = SBCIWRdK $r29r28, -64, implicit-def $sreg, implicit $sreg + ; CHECK-NEXT: STWPtrRr $r29r28, $r1r0 + ; CHECK-NEXT: POPWRd $r29r28, implicit-def $sp, implicit $sp + STDWPtrQRr $r29r28, 64, $r1r0 ... diff --git a/llvm/test/CodeGen/AVR/select-must-add-unconditional-jump.ll b/llvm/test/CodeGen/AVR/select-must-add-unconditional-jump.ll index e5b99f0b675..df98d73ae91 100644 --- a/llvm/test/CodeGen/AVR/select-must-add-unconditional-jump.ll +++ b/llvm/test/CodeGen/AVR/select-must-add-unconditional-jump.ll @@ -49,10 +49,10 @@ dead: ; basic block containing `select` needs to contain explicit jumps to ; both successors. -; CHECK: %bb.2.finish: +; CHECK: bb.2.finish: ; CHECK: BREQk [[BRANCHED:%bb.[0-9]+]] ; CHECK: RJMPk [[DIRECT:%bb.[0-9]+]] ; CHECK: Successors according to CFG ; CHECK-SAME-DAG: {{.*}}[[BRANCHED]] ; CHECK-SAME-DAG: {{.*}}[[DIRECT]] -; CHECK: %bb.3.dead: +; CHECK: bb.3.dead: |
