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* X86 Tests: Add more sdiv combine cases. NFCZvi Rackover2018-01-241-9/+3160
| | | | | | Add cases with vector non-splat pow2 contant divider. llvm-svn: 323329
* Regenerate shuffle sink testSimon Pilgrim2018-01-241-28/+39
| | | | llvm-svn: 323328
* Reverted 323321.Amjad Aboud2018-01-2424-958/+6
| | | | llvm-svn: 323326
* [AArch64] Avoid unnecessary vector byte-swapping in big-endianPablo Barrio2018-01-242-67/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Loads/stores of some NEON vector types are promoted to other vector types with different lane sizes but same vector size. This is not a problem in little-endian but, when in big-endian, it requires additional byte reversals required to preserve the lane ordering while keeping the right endianness of the data inside each lane. For example: %1 = load <4 x half>, <4 x half>* %p results in the following assembly: ld1 { v0.2s }, [x1] rev32 v0.4h, v0.4h This patch changes the promotion of these loads/stores so that the actual vector load/store (LD1/ST1) takes care of the endianness correctly and there is no need for further byte reversals. The previous code now results in the following assembly: ld1 { v0.4h }, [x1] Reviewers: olista01, SjoerdMeijer, efriedma Reviewed By: efriedma Subscribers: aemerson, rengolin, javed.absar, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D42235 llvm-svn: 323325
* [Hexagon] Remove unused HexagonISD opcodes, NFCKrzysztof Parzyszek2018-01-244-28/+5
| | | | llvm-svn: 323324
* [DebugInfo] Emit DWARF reference for DIVariable 'count' in DISubrangeSander de Smalen2018-01-243-1/+58
| | | | | | | | | | | | | | | | | | | | | | Summary: This patch implements the codegen of DWARF debug info for non-constant 'count' fields for DISubrange. This is patch [2/3] in a series to extend LLVM's DISubrange Metadata node to support debugging of C99 variable length arrays and vectors with runtime length like the Scalable Vector Extension for AArch64. It is also a first step towards representing more complex cases like arrays in Fortran. Reviewers: echristo, pcc, aprantl, dexonsmith, clayborg, kristof.beyls, dblaikie Reviewed By: aprantl Subscribers: fhahn, aemerson, rengolin, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D41696 llvm-svn: 323323
* [libcxx] Correctly handle invalid regex character class namesMikhail Maltsev2018-01-242-1/+38
| | | | | | | | | | | | | | | | | | | | Summary: Currently when a regular expression contains an invalid character class name std::regex constructors throw an std::regex_error with std::regex_constants::error_brack code. This patch changes the code to std::regex_constants::error_ctype and adds a test. Reviewers: EricWF, mclow.lists Reviewed By: mclow.lists Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D42291 llvm-svn: 323322
* [InstCombine] Introducing Aggressive Instruction Combine pass ↵Amjad Aboud2018-01-2424-6/+958
| | | | | | | | | | | | | | | | | | (-aggressive-instcombine). Combine expression patterns to form expressions with fewer, simple instructions. This pass does not modify the CFG. For example, this pass reduce width of expressions post-dominated by TruncInst into smaller width when applicable. It differs from instcombine pass in that it contains pattern optimization that requires higher complexity than the O(1), thus, it should run fewer times than instcombine pass. Differential Revision: https://reviews.llvm.org/D38313 llvm-svn: 323321
* [X86][SSE] Avoid calls to combineX86ShufflesRecursively that can't combine ↵Simon Pilgrim2018-01-241-9/+14
| | | | | | | | | | | | to target shuffles (PR32037) Don't bother making recursive calls to combineX86ShufflesRecursively if we have more shuffle source operands than will be combined together with the remaining recursive depth. See https://bugs.llvm.org/show_bug.cgi?id=32037#c26 and https://bugs.llvm.org/show_bug.cgi?id=32037#c27 for the reduction in compile times from this patch. Differential Revision: https://reviews.llvm.org/D42378 llvm-svn: 323320
* [clang-format] Disable string literal breaking for text protosKrasimir Georgiev2018-01-241-0/+6
| | | | | | | | | | | | | | | | Summary: Commonly string literals in protos are already multiline, so breaking them further is undesirable. Reviewers: djasper Reviewed By: djasper Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D42373 llvm-svn: 323319
* Fix typos of occurred and occurrenceMalcolm Parsons2018-01-2415-25/+25
| | | | llvm-svn: 323318
* Fixes Sphinx issue ('undefined label') introduced in r323313.Sander de Smalen2018-01-241-3/+7
| | | | | | | (and also slightly reformatted the related lines to look better in the rendered HTML) llvm-svn: 323317
* Fix typos of occurred and occurrenceMalcolm Parsons2018-01-249-11/+11
| | | | llvm-svn: 323316
* [builtins] Align addresses to cache lines in __clear_cache for aarch64Martin Storsjo2018-01-241-2/+4
| | | | | | | | | | | | This makes sure that the last cache line gets invalidated properly. This matches the example code at http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/BABJDBHI.html, and also matches what libgcc does. Differential Revision: https://reviews.llvm.org/D42196 llvm-svn: 323315
* [llvm-opt-fuzzer] Add couple of popular passesIgor Laevsky2018-01-241-0/+8
| | | | | | Differential Revision: https://reviews.llvm.org/D42410 llvm-svn: 323314
* [Metadata] Extend 'count' field of DISubrange to take a metadata nodeSander de Smalen2018-01-2419-34/+370
| | | | | | | | | | | | | | | | | | | | | | | Summary: This patch extends the DISubrange 'count' field to take either a (signed) constant integer value or a reference to a DILocalVariable or DIGlobalVariable. This is patch [1/3] in a series to extend LLVM's DISubrange Metadata node to support debugging of C99 variable length arrays and vectors with runtime length like the Scalable Vector Extension for AArch64. It is also a first step towards representing more complex cases like arrays in Fortran. Reviewers: echristo, pcc, aprantl, dexonsmith, clayborg, kristof.beyls, dblaikie Reviewed By: aprantl Subscribers: rnk, probinson, fhahn, aemerson, rengolin, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D41695 llvm-svn: 323313
* [DAGCombiner] Bail out if vector size is not a multipleSven van Haastregt2018-01-242-0/+16
| | | | | | | | | | | | For the included test case, the DAG transformation concat_vectors(scalar, undef) -> scalar_to_vector(sclr) would attempt to create a v2i32 vector for a v9i8 concat_vector. Bail out to avoid creating a bitcast with mismatching sizes later on. Differential Revision: https://reviews.llvm.org/D42379 llvm-svn: 323312
* [Doc] Guideline on adding exception handling support for a targetDavid Chisnall2018-01-241-0/+63
| | | | | | | | | | | | | | | | | Summary: This is the first attempt to write down a guideline on adding exception handling support for a target. The content basically bases on the discussion on [1]. If you guys know who is exception handling expert, please add him as the reviewer. Thanks. [1] http://lists.llvm.org/pipermail/llvm-dev/2018-January/120405.html Reviewers: t.p.northover, theraven, nemanjai Reviewed By: theraven Subscribers: sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D42178 llvm-svn: 323311
* Refactor RecursiveASTVisitor test for post-order traversalRaphael Isemann2018-01-244-129/+117
| | | | | | | | | | | | Summary: The new test is now in the right directory with the other ASTVisitor tests and uses now the provided TestVisitor framework. Subscribers: hintonda, v.g.vassilev, klimek, cfe-commits, mgorny Differential Revision: https://reviews.llvm.org/D37557 llvm-svn: 323310
* [NFC] Remove overconfident assert from IRCEMax Kazantsev2018-01-242-2/+42
| | | | | | | | | This patch removes assert that SCEV is able to prove that a value is non-negative. In fact, SCEV can sometimes be unable to do this because its cache does not update properly. This assert will be returned once this problem is resolved. llvm-svn: 323309
* [ARM] Call __chkstk for dynamic stack allocation in all windows environmentsMartin Storsjo2018-01-243-6/+5
| | | | | | | | | | | | | | | This matches what MSVC does for alloca() function calls on ARM. Even if MSVC doesn't support VLAs at the language level, it does support the alloca function. On the clang level, both the _alloca() (when emulating MSVC, which is what the alloca() function expands to) and __builtin_alloca() builtin functions, and VLAs, map to the same LLVM IR "alloca" function - so within LLVM they're not distinguishable from each other. Differential Revision: https://reviews.llvm.org/D42292 llvm-svn: 323308
* [GlobalMerge] Don't merge dllexport globalsMartin Storsjo2018-01-243-1/+32
| | | | | | | | | Merging such globals loses the dllexport attribute. Add a test to check that normal globals still are merged. Differential Revision: https://reviews.llvm.org/D42127 llvm-svn: 323307
* include <cstdint> to get uint32_tMarshall Clow2018-01-241-0/+1
| | | | llvm-svn: 323306
* [X86] Move 'Y' to correct place in FMA4 regular expression in Znver1 ↵Craig Topper2018-01-241-4/+4
| | | | | | | | scheduler model. I think these instructions used to be named differently and the regular expression reflected that. I guess we must have correct itinerary information that made this not matter for the scheduler test? llvm-svn: 323305
* [X86] Rename 256-bit VFRCZ instructions to have the Y before the rr/rm to ↵Craig Topper2018-01-242-4/+4
| | | | | | match other instructions. NFC llvm-svn: 323304
* [X86] Remove redundant regular expression from the Znver1 scheduler model. NFCCraig Topper2018-01-241-1/+0
| | | | llvm-svn: 323303
* [NFC] fix trivial typos in commentsHiroshi Inoue2018-01-247-8/+8
| | | | | | "the the" -> "the" llvm-svn: 323302
* [X86] Use ISD::SIGN_EXTEND instead of X86ISD::VSEXT for mask to xmm/ymm/zmm ↵Craig Topper2018-01-242-3/+21
| | | | | | | | | | | | | | conversion There are a couple tricky things with this patch. I had to add an override of isVectorLoadExtDesirable to stop DAG combine from combining sign_extend with loads after legalization since we legalize sextload using a load+sign_extend. Overriding this hook actually prevents a lot sextloads from being created in the first place. I also had to add isel patterns because DAG combine blindly combines sign_extend+truncate to a smaller sign_extend which defeats what legalization was trying to do. Differential Revision: https://reviews.llvm.org/D42407 llvm-svn: 323301
* libcxx: Allow auto-linking to be disabled with a macro.Peter Collingbourne2018-01-241-5/+7
| | | | | | | | | | | Some users may have a custom build system which gives a different name to the libc++ archive (or does not create an archive at all, instead passing the object files directly to the linker). Give those users a way to disable auto-linking. Differential Revision: https://reviews.llvm.org/D42436 llvm-svn: 323300
* [WebAssembly] Use inline target tripple in test casesSam Clegg2018-01-2447-51/+133
| | | | | | | | | | This is somewhat preferable since (in many cases) it allows llc to be run directly on the .ll files without having to pass the `-mtriple` argument. Differential Revision: https://reviews.llvm.org/D42438 llvm-svn: 323299
* [Dominators] Introduce DomTree verification levelsJakub Kuderski2018-01-244-46/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Currently, there are 2 ways to verify a DomTree: * `DT.verify()` -- runs full tree verification and checks all the properties and gives a reason why the tree is incorrect. This is run by when EXPENSIVE_CHECKS are enabled or when `-verify-dom-info` flag is set. * `DT.verifyDominatorTree()` -- constructs a fresh tree and compares it against the old one. This does not check any other tree properties (DFS number, levels), nor ensures that the construction algorithm is correct. Used by some passes inside assertions. This patch introduces DomTree verification levels, that try to close the gape between the two ways of checking trees by introducing 3 verification levels: - Full -- checks all properties, but can be slow (O(N^3)). Used when manually requested (e.g. `assert(DT.verify())`) or when `-verify-dom-info` is set. - Basic -- checks all properties except the sibling property, and compares the current tree with a freshly constructed one instead. This should catch almost all errors, but does not guarantee that the construction algorithm is correct. Used when EXPENSIVE checks are enabled. - Fast -- checks only basic properties (reachablility, dfs numbers, levels, roots), and compares with a fresh tree. This is meant to replace the legacy `DT.verifyDominatorTree()` and in my tests doesn't cause any noticeable performance impact even in the most pessimistic examples. When used to verify dom tree wrapper pass analysis on sqlite3, the 3 new levels make `opt -O3` take the following amount of time on my machine: - no verification: 8.3s - `DT.verify(VerificationLevel::Fast)`: 10.1s - `DT.verify(VerificationLevel::Basic)`: 44.8s - `DT.verify(VerificationLevel::Full)`: 1m 46.2s (and the previous `DT.verifyDominatorTree()` is within the noise of the Fast level) This patch makes `DT.verifyDominatorTree()` pick between the 3 verification levels depending on EXPENSIVE_CHECKS and `-verify-dom-info`. Reviewers: dberlin, brzycki, davide, grosser, dmgreen Reviewed By: dberlin, brzycki Subscribers: MatzeB, llvm-commits Differential Revision: https://reviews.llvm.org/D42337 llvm-svn: 323298
* Don't assume a null GV is local for ELF and MachO.Rafael Espindola2018-01-247-27/+34
| | | | | | | | | | | This is already a simplification, and should help with avoiding a plt reference when calling an intrinsic with -fno-plt. With this change we return false for null GVs, so the caller only needs to check the new metadata to decide if it should use foo@plt or *foo@got. llvm-svn: 323297
* Implement P0463R1: 'Endian just Endian'. Reviewed as ↵Marshall Clow2018-01-242-0/+62
| | | | | | https://reviews.llvm.org/D35472 llvm-svn: 323296
* Remove set but unused variable IsUndef.Eric Christopher2018-01-241-2/+1
| | | | llvm-svn: 323295
* Attempt to fix implicit-fallthrough warning after r323218.Nico Weber2018-01-241-0/+1
| | | | llvm-svn: 323294
* Fix typo in comment.Nico Weber2018-01-241-1/+1
| | | | llvm-svn: 323293
* X86: Update isVectorShiftByScalarCheap with cases covered by AVX512BWZvi Rackover2018-01-242-10/+32
| | | | | | | | | | | | | | | | Summary: AVX512BW adds support for variable shift amount for 16-bit element vectors. Reviewers: craig.topper, RKSimon, spatel Reviewed By: RKSimon Subscribers: rengolin, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D42437 llvm-svn: 323292
* [GISel]: Remove redundant copies at the end of ISelAditya Nandakumar2018-01-2415-83/+75
| | | | | | | | | https://reviews.llvm.org/D42402 A lot of these copies are useless (copies b/w VRegs having the same regclass) and should be cleaned up. llvm-svn: 323291
* [WebAssembly] Add minor helper functions to WasmObjectFileSam Clegg2018-01-242-9/+21
| | | | | | | | Also, fix crash when exporting an imported function. Differential Revision: https://reviews.llvm.org/D42454 llvm-svn: 323290
* AArch64: Cyclone: Remove SlowMisaligned128Store tuning flagMatthias Braun2018-01-245-15/+12
| | | | | | | | | | | | | | | Remove FeatureSlowMisaligned128Store from cyclone flags. This flag causes splitting of 16 byte wide stores into 2 stored of 8 bytes. This was useful on older apple CPUs which were slow for 16byte stores that were not aligned on 16byte. As the compiler often cannot predict the actual alignment, the splitting was choosen. This has been a topic for a lot of debate as the splitting also decreases performance for some benchmarks. Measuring the effects on newer apple chips (rdar://35525421) shows that it harms more cases than it helps. So it is time to retire this workaround. llvm-svn: 323289
* Fix retpoline PLT header size for i386.Rui Ueyama2018-01-242-43/+27
| | | | | | Differential Revision: https://reviews.llvm.org/D42397 llvm-svn: 323288
* Remove trailing whitespace.Rui Ueyama2018-01-2414-280/+280
| | | | llvm-svn: 323287
* [WebAssembly] Remove excess debugging. NFC.Sam Clegg2018-01-241-2/+0
| | | | llvm-svn: 323286
* Fix test Driver/solaris-ld.c for Windows.Douglas Yung2018-01-241-33/+33
| | | | | | | | | - Test needs to be able to handle "clang.exe" on Windows - Test needs to be able to handle either '/' or '\\' used as the path separator Reviewed by Paul Robinson llvm-svn: 323285
* [ScopBuilder] Prefer PHI Write accesses in the statement the incoming value ↵Michael Kruse2018-01-235-78/+53
| | | | | | | | | | | | | | | | | | is defined. Theoretically, a PHI write can be added to any statement that represents the incoming basic block. We previously always chose the last because the incoming value's definition is guaranteed to be defined. With this patch the PHI write is added to the statement that defines the incoming value. It avoids the requirement for a scalar dependency between the defining statement and the statement containing the write. As such the logic for -polly-stmt-granularity=scalar-indep that ensures that there is such scalar dependencies can be removed. Differential Revision: https://reviews.llvm.org/D42147 llvm-svn: 323284
* [VirtualInst] Derive correct use kind of PHI operands. NFC.Michael Kruse2018-01-232-7/+30
| | | | | | | | | | VirtualUse::create is only called for MemoryKind::Value, but its consistency nonetheless checked in verifyUses(). PHI uses are always inter-stmt dependencies, which was not considered by the constructor method. The virtual and non-virtual execution paths were the same, such that verifyUses did not encounter any inconsistencies. llvm-svn: 323283
* [WebAssembly] Add --relocatable test to test/wasm/weak-alias.ll. NFC.Sam Clegg2018-01-231-0/+147
| | | | | | | | There seems to be an bug related to table relocations not being written correctly in this case. This change is intended simply to increase the coverage, not fix the issue. llvm-svn: 323282
* Adjust MaxAtomicInlineWidth for i386/i486 targets.Wei Mi2018-01-232-5/+65
| | | | | | | | | | | | | | This is to fix the bug reported in https://bugs.llvm.org/show_bug.cgi?id=34347#c6. Currently, all MaxAtomicInlineWidth of x86-32 targets are set to 64. However, i386 doesn't support any cmpxchg related instructions. i486 only supports cmpxchg. So in this patch MaxAtomicInlineWidth is reset as follows: For i386, the MaxAtomicInlineWidth should be 0 because no cmpxchg is supported. For i486, the MaxAtomicInlineWidth should be 32 because it supports cmpxchg. For others 32 bits x86 cpu, the MaxAtomicInlineWidth should be 64 because of cmpxchg8b. Differential Revision: https://reviews.llvm.org/D42154 llvm-svn: 323281
* [llvm-readobj] Fix double 0x prefix in RVA table printing after r321527Reid Kleckner2018-01-231-1/+1
| | | | llvm-svn: 323280
* Break a line into <= 80 charactersKamil Rytarowski2018-01-231-1/+2
| | | | llvm-svn: 323279
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