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| author | Craig Topper <craig.topper@intel.com> | 2018-01-24 05:14:39 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-24 05:14:39 +0000 |
| commit | a55ac7b790b8d3d9ab030e894828ab9216b4f0e4 (patch) | |
| tree | 5bf4fd43608dac34779d374b6a2c8eca66f8b2a0 | |
| parent | fd68c2d0ae8a8b507a28427607be89d216bf08cd (diff) | |
| download | bcm5719-llvm-a55ac7b790b8d3d9ab030e894828ab9216b4f0e4.tar.gz bcm5719-llvm-a55ac7b790b8d3d9ab030e894828ab9216b4f0e4.zip | |
[X86] Rename 256-bit VFRCZ instructions to have the Y before the rr/rm to match other instructions. NFC
llvm-svn: 323304
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrXOP.td | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index dd634bb412d..9fdf43e81df 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -842,9 +842,9 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI) // XOP foldable instructions { X86::VFRCZPDrr, X86::VFRCZPDrm, 0 }, - { X86::VFRCZPDrrY, X86::VFRCZPDrmY, 0 }, + { X86::VFRCZPDYrr, X86::VFRCZPDYrm, 0 }, { X86::VFRCZPSrr, X86::VFRCZPSrm, 0 }, - { X86::VFRCZPSrrY, X86::VFRCZPSrmY, 0 }, + { X86::VFRCZPSYrr, X86::VFRCZPSYrm, 0 }, { X86::VFRCZSDrr, X86::VFRCZSDrm, 0 }, { X86::VFRCZSSrr, X86::VFRCZSSrm, 0 }, { X86::VPHADDBDrr, X86::VPHADDBDrm, 0 }, diff --git a/llvm/lib/Target/X86/X86InstrXOP.td b/llvm/lib/Target/X86/X86InstrXOP.td index c4b8e3e90d2..435dd2498ce 100644 --- a/llvm/lib/Target/X86/X86InstrXOP.td +++ b/llvm/lib/Target/X86/X86InstrXOP.td @@ -64,10 +64,10 @@ multiclass xop2op128<bits<8> opc, string OpcodeStr, Intrinsic Int, multiclass xop2op256<bits<8> opc, string OpcodeStr, Intrinsic Int, PatFrag memop> { - def rrY : IXOP<opc, MRMSrcReg, (outs VR256:$dst), (ins VR256:$src), + def Yrr : IXOP<opc, MRMSrcReg, (outs VR256:$dst), (ins VR256:$src), !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), [(set VR256:$dst, (Int VR256:$src))]>, XOP, VEX_L, Sched<[WriteFAdd]>; - def rmY : IXOP<opc, MRMSrcMem, (outs VR256:$dst), (ins f256mem:$src), + def Yrm : IXOP<opc, MRMSrcMem, (outs VR256:$dst), (ins f256mem:$src), !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), [(set VR256:$dst, (Int (bitconvert (memop addr:$src))))]>, XOP, VEX_L, Sched<[WriteFAddLd, ReadAfterLd]>; |
