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* [APSInt][OpenMP] Fix isNegative, etc. for unsigned typesJoel E. Denny2019-04-2364-124/+359
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch, APSInt inherits APInt::isNegative, which merely checks the sign bit without regard to whether the type is actually signed. isNonNegative and isStrictlyPositive call isNegative and so are also affected. This patch adjusts APSInt to override isNegative, isNonNegative, and isStrictlyPositive with implementations that consider whether the type is signed. A large set of Clang OpenMP tests are affected. Without this patch, these tests assume that `true` is not a valid argument for clauses like `collapse`. Indeed, `true` fails APInt::isStrictlyPositive but not APSInt::isStrictlyPositive. This patch adjusts those tests to assume `true` should be accepted. This patch also adds tests revealing various other similar fixes due to APSInt::isNegative calls in Clang's ExprConstant.cpp and SemaExpr.cpp: `++` and `--` overflow in `constexpr`, evaluated object size based on `alloc_size`, `<<` and `>>` shift count validation, and OpenMP array section validation. Reviewed By: lebedev.ri, ABataev, hfinkel Differential Revision: https://reviews.llvm.org/D59712 llvm-svn: 359012
* Revert "[EditLineTest] Not always TERM is available, e.g. on some bots."Davide Italiano2019-04-231-13/+3
| | | | | | | This was a speculative fix trying to placate some bots, but it's ultimately just a bot configuration problem and not a code problem. llvm-svn: 359011
* [dsymutil] Put Swift interface files into a per-arch subdirectory.Adrian Prantl2019-04-232-2/+2
| | | | | | | | | This was meant to be part of the original commit r358921, but somehow got lost. <rdar://problem/49751748> llvm-svn: 359010
* MS ABI: Support mangling op<=> now that MSVC 2019 has a manglingNico Weber2019-04-232-11/+8
| | | | llvm-svn: 359009
* [x86] fix test checks for fdiv combine; NFCSanjay Patel2019-04-231-5/+9
| | | | | | Must have picked up some transient code changes when originally generating this. llvm-svn: 359008
* llvm-undname: Support demangling the spaceship operatorNico Weber2019-04-234-7/+16
| | | | | | Also add a test for demanling the co_await operator. llvm-svn: 359007
* [x86] add tests for vector fdiv with splat divisor; NFCSanjay Patel2019-04-231-0/+101
| | | | llvm-svn: 359006
* [Docs] Add missing leading slashJonas Devlieghere2019-04-231-5/+5
| | | | llvm-svn: 359005
* [Docs] Add 301 redirects for old URLsJonas Devlieghere2019-04-232-0/+8
| | | | llvm-svn: 359004
* [dsymutil] Fix use-after-free when sys::path::append grows the buffer.Adrian Prantl2019-04-231-2/+2
| | | | | | <rdar://problem/50117620> llvm-svn: 359003
* Revert "[dsymutil] Fix use-after-free when sys::path::append grows the buffer."Adrian Prantl2019-04-231-1/+1
| | | | llvm-svn: 359002
* [dsymutil] Fix use-after-free when sys::path::append grows the buffer.Adrian Prantl2019-04-231-1/+1
| | | | | | <rdar://problem/50117620> llvm-svn: 359001
* [InstCombine] Convert a masked.load of a dereferenceable address to an ↵Philip Reames2019-04-232-6/+17
| | | | | | | | | | unconditional load If we have a masked.load from a location we know to be dereferenceable, we can simply issue a speculative unconditional load against that address. The key advantage is that it produces IR which is well understood by the optimizer. The select (cnd, load, passthrough) form produced should be pattern matchable back to hardware predication if profitable. Differential Revision: https://reviews.llvm.org/D59703 llvm-svn: 359000
* [x86] use psubus for more vsetcc lowering (PR39859)Sanjay Patel2019-04-232-13/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Circling back to a leftover bit from PR39859: https://bugs.llvm.org/show_bug.cgi?id=39859#c1 ...we have this counter-intuitive (based on the test diffs) opportunity to use 'psubus'. This appears to be the better perf option for both Haswell and Jaguar based on llvm-mca. We already do this transform for the SETULT predicate, so this makes the code more symmetrical too. If we have pminub/pminuw, we prefer those, so this should not affect anything but pre-SSE4.1 subtargets. $ cat before.s movdqa -16(%rip), %xmm2 ## xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768] pxor %xmm0, %xmm2 pcmpgtw -32(%rip), %xmm2 ## xmm2 = [255,255,255,255,255,255,255,255] pand %xmm2, %xmm0 pandn %xmm1, %xmm2 por %xmm2, %xmm0 $ cat after.s movdqa -16(%rip), %xmm2 ## xmm2 = [256,256,256,256,256,256,256,256] psubusw %xmm0, %xmm2 pxor %xmm3, %xmm3 pcmpeqw %xmm2, %xmm3 pand %xmm3, %xmm0 pandn %xmm1, %xmm3 por %xmm3, %xmm0 $ llvm-mca before.s -mcpu=haswell Iterations: 100 Instructions: 600 Total Cycles: 909 Total uOps: 700 Dispatch Width: 4 uOps Per Cycle: 0.77 IPC: 0.66 Block RThroughput: 1.8 $ llvm-mca after.s -mcpu=haswell Iterations: 100 Instructions: 700 Total Cycles: 409 Total uOps: 700 Dispatch Width: 4 uOps Per Cycle: 1.71 IPC: 1.71 Block RThroughput: 1.8 Differential Revision: https://reviews.llvm.org/D60838 llvm-svn: 358999
* [SPARC] Use the correct register set for the "r" asm constraint.Joerg Sonnenberger2019-04-232-0/+12
| | | | | | | | 64bit mode must use 64bit registers, otherwise assumptions about the top half of the registers are made. Problem found by Takeshi Nakayama in NetBSD. llvm-svn: 358998
* Revert "DebugInfo: Emit only one kind of accelerated access/name table"David Blaikie2019-04-235-94/+5
| | | | | | | | Regresses some apple_names situations - still investigating. This reverts commit r358931. llvm-svn: 358997
* Use llvm::stable_sortFangrui Song2019-04-2346-186/+146
| | | | | | While touching the code, simplify if feasible. llvm-svn: 358996
* [WebAssembly] Fix typo in relocation checkingSam Clegg2019-04-232-1/+56
| | | | | | | | | | | Runtime relocation are generated for relocations of type R_WASM_MEMORY_ADDR_I32 when in PIC mode (either -shared or -pie). Followup on https://reviews.llvm.org/D60882. Differential Revision: https://reviews.llvm.org/D60992 llvm-svn: 358995
* [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiersLewis Revill2019-04-2310-10/+86
| | | | | | | | | This patch adds support for parsing and assembling the %tls_ie_pcrel_hi and %tls_gd_pcrel_hi modifiers. Differential Revision: https://reviews.llvm.org/D55342 llvm-svn: 358994
* gn build: Merge r358944Nico Weber2019-04-231-0/+1
| | | | llvm-svn: 358993
* [AMDGPU] Fix hidden argument metadata duplication for V3Scott Linder2019-04-235-178/+461
| | | | | | | | | | Essentially complete a proper rebase of the V3 metadata change over https://reviews.llvm.org/D49096. Minimize the diff between the V2 and V3 variants of the relevant lit tests, and clean up some trailing whitespace. llvm-svn: 358992
* gn build: Merge r358949Nico Weber2019-04-232-0/+2
| | | | llvm-svn: 358991
* [LLD][ELF] - Remove dynamic-section-sh_size.elf binary, convert test to ↵George Rimar2019-04-233-4/+36
| | | | | | | | | | | | | yaml. NFCI. dynamic-section-sh_size.elf was introduced in D25090. Now it is possible to use yaml2obj instead. That is what this patch does. Also I added one more case of a possibly broken .dynamic section just in case. llvm-svn: 358990
* [X86] Pull out collectConcatOps helper. NFCI.Simon Pilgrim2019-04-231-21/+51
| | | | | | Create collectConcatOps helper that returns all the subvector ops for CONCAT_VECTORS or a INSERT_SUBVECTOR series. llvm-svn: 358989
* [libc++] Remove redundant conditionals for Apple platformsLouis Dionne2019-04-233-8/+6
| | | | | | | | | | | | | | | | | | | Summary: In a bunch of places, we used to check whether LIBCXX_BUILDING_LIBCXXABI is defined OR we're building for an Apple platform. This used to be necessary in a time when Apple's build script did NOT define LIBCXX_BUILDING_LIBCXXABI. However this is not relevant anymore since Apple's build does define LIBCXX_BUILDING_LIBCXXABI. Reviewers: EricWF Subscribers: christof, jkorous, dexonsmith, libcxx-commits Tags: #libc Differential Revision: https://reviews.llvm.org/D60842 llvm-svn: 358988
* ARM: disallow add/sub to sp unless Rn is also sp.Tim Northover2019-04-234-1/+78
| | | | | | | | The manual says that Thumb2 add/sub instructions are only allowed to modify sp if the first source is also sp. This is slightly different from the usual rGPR restriction since it's context-sensitive, so implement it in C++. llvm-svn: 358987
* [Docs] ReleaseNotes: fixup markup in memcmp()->bcmp() entryRoman Lebedev2019-04-231-4/+4
| | | | llvm-svn: 358986
* [LLD][ELF] - Remove file-class.a binary from inputs and improve the test case.George Rimar2019-04-233-4/+19
| | | | | | | | | | | | | file-class.a was used to diagnose the "corrupted ELF file: invalid file class" error when the object was fetched from the archive. file-class.a contained an object of 16 bytes size. I replaced it with an echo call (because it is impossible to use yaml2obj for that, and I am not sure it is worth to support), and also increased its size to 18 bytes. That allowed to also test a case when such object is a regular input and not an archive member (we have a bit different logic for these cases). llvm-svn: 358985
* [DAGCombiner] generalize binop-of-splats scalarizationSanjay Patel2019-04-232-74/+52
| | | | | | | | | | | | | | If we only match build vectors, we can miss some patterns that use shuffles as seen in the affected tests. Note that the underlying calls within getSplatSourceVector() have the potential for compile-time explosion because of exponential recursion looking through binop opcodes, but currently the list of supported opcodes is very limited. Both of those problems should be addressed in follow-up patches. llvm-svn: 358984
* AMDGPU: Fix LCSSA phi lowering in SILowerI1CopiesNicolai Haehnle2019-04-232-1/+41
| | | | | | | | | | | | | | | | | | | | | | Summary: When an LCSSA phi survives through instruction selection, the pass ends up removing that phi entirely because it is dominated by the logic that does the lanemask merging. This then used to trigger an assertion when processing a dependent phi instruction. Change-Id: Id4949719f8298062fe476a25718acccc109113b6 Reviewers: llvm-commits Subscribers: kzhuravl, jvesely, wdng, yaxunl, t-tye, tpr, dstuttard, rtaylor, arsenm Tags: #llvm Differential Revision: https://reviews.llvm.org/D60999 llvm-svn: 358983
* [CallSite removal] move InlineCost to CallBase usageFedor Sergeev2019-04-237-118/+117
| | | | | | | | | | | Converting InlineCost interface and its internals into CallBase usage. Inliners themselves are still not converted. Reviewed By: reames Tags: #llvm Differential Revision: https://reviews.llvm.org/D60636 llvm-svn: 358982
* [ELF] Change default output section type to SHT_PROGBITSAndrew Ng2019-04-237-10/+45
| | | | | | | | | | | | This fixes an issue where a symbol only section at the start of a PT_LOAD segment, causes incorrect alignment of the file offset for the start of the segment which results in the output of an invalid ELF. SHT_PROGBITS was the default output section type in the past. Differential Revision: https://reviews.llvm.org/D60131 llvm-svn: 358981
* [LLD][COFF] Fix /linkrepro with output options that take a filename or pathAlexandre Ganea2019-04-232-1/+19
| | | | | | | | The following options: /pdb, /out or /implib now emit in the repro.tar/response.txt only a filename stripped from its path, to avoid non-existent paths on the reproducer's machine. Differential Revision: https://reviews.llvm.org/D59530 llvm-svn: 358980
* [ELF] Change findOrphanPos to only consider live sectionsAndrew Ng2019-04-231-4/+7
| | | | | | | | | | This patch changes the behaviour of findOrphanPos to only consider live sections when placing orphan sections. This used to be how it behaved in the past. Differential Revision: https://reviews.llvm.org/D60273 llvm-svn: 358979
* Removing the explicit specifier from some default constructors; NFC.Aaron Ballman2019-04-231-2/+2
| | | | llvm-svn: 358978
* [ARM] Update check for CBZ in IfcvtDavid Green2019-04-234-43/+238
| | | | | | | | | | | The check for creating CBZ in constant island pass recently obtained the ability to search backwards to find a Cmp instruction. The code in IfCvt should mirror this to allow more conversions to the smaller form. The common code has been pulled out into a separate function to be shared between the two places. Differential Revision: https://reviews.llvm.org/D60090 llvm-svn: 358977
* Move postfix expression code out of the NativePDB pluginPavel Labath2019-04-232-233/+246
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The NativePDB plugin contains code to convert "programs" describing the layout of function frames into dwarf (for easier interaction with the rest of lldb). This functionality is useful for the Breakpad plugin too, as it contains the same kind of expressions (because breakpad info is generated from pdb files). In this patch, I move the core classes of this code into a common place, where it can be used from both files. Previously, these were the details of the implementation, but here I am exposing them (instead of just a single "string->string" conversion function), as breakpad will need to use these in a slightly different way. The reason for that is that breakpad files generated from dwarf expressions use a slightly different syntax, although most of the core code can be reused with a bit of thought. This is also the reason why I am not moving the parsing or dwarf generation bits, as they will need to be generalized a bit before they're usable for both scenarios. This patch should be NFC, modulo renaming the moved entities to more neutral names. The reason I am moving this to the "Symbol" library, is because both customers will be "Symbol"Files, and also the unwinding code lives in the Symbol library. From a purely dependency standpoint this code will probably be standalone, and so it could be moved all the way to Utility, but that seems too low for this kind of functionality. Reviewers: jasonmolenda, amccarth, clayborg, JDevlieghere, aleksandr.urakov Subscribers: aprantl, markmentovai, lldb-commits Differential Revision: https://reviews.llvm.org/D60599 llvm-svn: 358976
* [PPC][PPC64] Improve some llvm-objdump -d -D testsFangrui Song2019-04-2316-325/+261
| | | | | | | | | | | | | | | | | | | | | Various improvement: Some offsets in disassembly are incorrect after several layout adjustment. Fix them. llvm-objdump -D should not be used. -D dumps unrelated non-text sections. Replace them with llvm-objdump -d, llvm-readelf -x, etc Many llvm-objdump -d tests use {{.*}} . Add the option --no-show-raw-insn to avoid check hex bytes. ppc64-long-branch.s does not need a shared object. Delete it. Make ppc64-ifunc.s check 2 ifuncs. Reviewers: ruiu, espindola Subscribers: emaste, nemanjai, arichardson, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60998 llvm-svn: 358975
* [ARM] Don't replicate instructions in Ifcvt at minsizeDavid Green2019-04-232-0/+101
| | | | | | | | | | Ifcvt can replicate instructions as it converts them to be predicated. This stops that from happening on thumb2 targets at minsize where an extra IT instruction is likely needed. Differential Revision: https://reviews.llvm.org/D60089 llvm-svn: 358974
* Fix "-Wimplicit-fallthrough" warning. NFCI.Simon Pilgrim2019-04-231-0/+1
| | | | llvm-svn: 358973
* [LLD][ELF] - Fix mips-invalid-options-descriptor.s test case and convert to ↵George Rimar2019-04-233-5/+21
| | | | | | | | | | | | | | YAML. It was initially introduced in D25229 to report the "zero option descriptor size" error message. In following commits it was broken and did not report this error anymore. I think that happened because elf object was a result of fuzzing and it was broken in many ways. This patch converts this test to a YAML, removes a binary and hence fixes the original intention. llvm-svn: 358972
* [Analyzer] Second fix for last commit for IteratorCheckerAdam Balogh2019-04-231-1/+1
| | | | | | | A variable was redeclared instead of assigned in an internal block, leaving the original uninitialized. This is fixed now. llvm-svn: 358971
* Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.Simon Pilgrim2019-04-231-2/+2
| | | | llvm-svn: 358970
* Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.Simon Pilgrim2019-04-231-2/+2
| | | | llvm-svn: 358969
* [analyzer][CrossTU] Extend CTU to VarDecls with initializerRafael Stahl2019-04-2310-87/+335
| | | | | | | | | | | | | | | | | | | | | | Summary: The existing CTU mechanism imports `FunctionDecl`s where the definition is available in another TU. This patch extends that to VarDecls, to bind more constants. - Add VarDecl importing functionality to CrossTranslationUnitContext - Import Decls while traversing them in AnalysisConsumer - Add VarDecls to CTU external mappings generator - Name changes from "external function map" to "external definition map" Reviewers: NoQ, dcoughlin, xazax.hun, george.karpenkov, martong Reviewed By: xazax.hun Subscribers: Charusso, baloghadamsoftware, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, george.karpenkov, mgorny, whisperity, szepet, rnkovacs, a.sidorin, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D46421 llvm-svn: 358968
* modify-python-lldb: Remove \a-removing codePavel Labath2019-04-235-23/+19
| | | | | | instead, remove \a directly from the interface files. llvm-svn: 358967
* [LLD][ELF] - Remove multiple-eh-relocs.elf binary from the inputs. NFCI.George Rimar2019-04-233-4/+29
| | | | | | Introduced multiple-relocations-sections.test based on YAML instead. llvm-svn: 358966
* [DAGCombiner] Combine OR as ADD when no common bits are setBjorn Pettersson2019-04-239-176/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The DAGCombiner is rewriting (canonicalizing) an ISD::ADD with no common bits set in the operands as an ISD::OR node. This could sometimes result in "missing out" on some combines that normally are performed for ADD. To be more specific this could happen if we already have rewritten an ADD into OR, and later (after legalizations or combines) we expose patterns that could have been optimized if we had seen the OR as an ADD (e.g. reassociations based on ADD). To make the DAG combiner less sensitive to if ADD or OR is used for these "no common bits set" ADD/OR operations we now apply most of the ADD combines also to an OR operation, when value tracking indicates that the operands have no common bits set. Reviewers: spatel, RKSimon, craig.topper, kparzysz Reviewed By: spatel Subscribers: arsenm, rampitec, lebedev.ri, jvesely, nhaehnle, hiraditya, javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59758 llvm-svn: 358965
* FuncUnwinders: remove "current_offset" from function argumentsPavel Labath2019-04-239-117/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This argument was added back in 2010 (r118882) to support the ability to unwind from functions whose eh_frame entry does not cover the entire range of the function. However, due to the caching happening in FuncUnwinders, this solution is very fragile. FuncUnwinders will cache the plan it got from eh_frame regardless of the value of the current_offset, so our ability to unwind from a given function depended what was the value of "current_offset" the first time that this function was called. Furthermore, since the "image show-unwind" command did not know what's the right offset to pass, this created an unfortunate situation where "image show-unwind" would show no valid plans for a function, even though they were available and being used. In this patch I implement the feature slightly differently. Instead of giving just a base address to the eh_frame unwinder, I give it the entire range we are interested in. Then, I change the unwinder to return the first plan that covers (even partially) that range. This way even a partial plan will be returned, regardless of the address in the function where we are stopped at. This solution is still not 100% correct, as it will not handle a function which is covered by two independent fde entries. However, I don't expect anybody will write this kind of functions, and this wasn't handled by the previous implementation either. If this is ever needed in the future. The eh_frame unwinder can be extended to return "composite" unwind plans created by merging sevelar fde entries. I also create a test which triggers this scenario. As doing this is virtually impossible without hand-written assembly, the test only works on x86 linux. Reviewers: jasonmolenda, clayborg Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D60829 llvm-svn: 358964
* [AArch64] Add support for MTE intrinsicsJaved Absar2019-04-236-22/+592
| | | | | | | | | | | This patch provides intrinsics support for Memory Tagging Extension (MTE), which was introduced with the Armv8.5-a architecture. The intrinsics are described in detail in the latest ACLE Q1 2019 documentation: https://developer.arm.com/docs/101028/latest Reviewed by: David Spickett Differential Revision: https://reviews.llvm.org/D60486 llvm-svn: 358963
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