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* Update status of 2950Marshall Clow2017-10-291-4/+4
| | | | llvm-svn: 316873
* [Acc] Do not statically dispatch into IslNodeBuilder's createForPhilip Pfaffe2017-10-293-9/+14
| | | | | | | | | | | | | | | | | | | | Summary: When GPUNodeBuilder creates loops inside the kernel, it dispatches to IslNodeBuilder. This however is surprisingly dangerous, since it accesses the AST Node's user through the wrong type. This patch fixes this problem by overriding createFor correctly. This fixes PR35010. Reviewers: grosser, bollu, Meinersbur Reviewed By: Meinersbur Subscribers: Meinersbur, nemanjai, pollydev, llvm-commits, kbarton Differential Revision: https://reviews.llvm.org/D39364 llvm-svn: 316872
* [X86][SSE] Split ComputeNumSignBits SEXT/AND/XOR/OR demandedelts testSimon Pilgrim2017-10-291-17/+65
| | | | | | Max depth was being exceeded which could prevent some combines working llvm-svn: 316871
* Fix two testcases. NFC intended.Philip Pfaffe2017-10-292-13/+13
| | | | | | | | Add missing %loadPolly directive to support out of tree builds. One of the changes is somewhat bigger, because the directive turns on LLVM names, and the testcase deosn't use those. llvm-svn: 316870
* [(new) Pass Manager] instantiate SimplifyCFG with the same options as the old PMSanjay Patel2017-10-293-64/+40
| | | | | | | | | | | | The old PM sets the options of what used to be known as "latesimplifycfg" on the instantiation after the vectorizers have run, so that's what we'redoing here. FWIW, there's a later SimplifyCFGPass instantiation in both PMs where we do not set the "late" options. I'm not sure if that's intentional or not. Differential Revision: https://reviews.llvm.org/D39407 llvm-svn: 316869
* [X86][SSE] ComputeNumSignBits tests showing missing SEXT/AND/XOR/OR ↵Simon Pilgrim2017-10-291-0/+68
| | | | | | demandedelts support llvm-svn: 316868
* Issues to be voted on in ABQMarshall Clow2017-10-291-31/+50
| | | | llvm-svn: 316867
* [SelectionDAG] Add SRA/SHL demanded elts support to ComputeNumSignBitsSimon Pilgrim2017-10-292-27/+43
| | | | | | Introduce a isConstOrDemandedConstSplat helper function that can recognise a constant splat build vector for at least the demanded elts we care about. llvm-svn: 316866
* [X86][SSE] ComputeNumSignBits tests showing missing SHL/SRA demandedelts ↵Simon Pilgrim2017-10-291-3/+90
| | | | | | support llvm-svn: 316865
* [X86] Add a slow-incdec command line to atomic-eflags-reuse.llCraig Topper2017-10-291-38/+82
| | | | | | I believe the test_sub_1_cmp_1_setcc_ugt test case is being miscompiled in the fast inc/dec case. llvm-svn: 316864
* Fix ubsan error that shift amount 64 is too large.Rui Ueyama2017-10-291-1/+3
| | | | llvm-svn: 316863
* Remove a redundant temporary variable.Rui Ueyama2017-10-291-2/+1
| | | | llvm-svn: 316862
* [X86] Remove combine that turns X86ISD::LSUB into X86ISD::LADD. Update ↵Craig Topper2017-10-293-32/+11
| | | | | | | | | | | | patterns that depended on this. If the carry flag is being used, this transformation isn't safe. This does prevent some test cases from using DEC now, but I'll try to look into that separately. Fixes PR35068. llvm-svn: 316860
* [X86] Fix typo in comment. NFCCraig Topper2017-10-291-1/+1
| | | | llvm-svn: 316859
* Driver: default to `unsigned int` `wchar_t` for ARMSaleem Abdulrasool2017-10-292-1/+59
| | | | | | | | | | AAPCS and AAPCS64 mandate that `wchar_t` with `-fno-short-wchar` is an `unsigned int` rather than a `signed int`. Ensure that the driver does not flip the signedness of `wchar_t` for those targets. Add additional tests to ensure that this does not regress. llvm-svn: 316858
* [X86] Use the extended vector register classes in fast isel with AVX512F/VL.Craig Topper2017-10-291-10/+10
| | | | llvm-svn: 316857
* [X86] Add AVX512 support to X86FastISel::X86SelectFPExt and ↵Craig Topper2017-10-292-4/+13
| | | | | | X86FastISel::X86SelectFPTrunc. llvm-svn: 316856
* [X86] Use update_llc_test_checks.py to regenerate ↵Craig Topper2017-10-291-16/+37
| | | | | | fast-isel-int-float-conversion.ll llvm-svn: 316855
* [X86] Use update_llc_test_checks.py to regenerate fast-isel-fptrunc-fpext.llCraig Topper2017-10-291-18/+39
| | | | llvm-svn: 316854
* [X86] Add AVX512 support to X86FastISel::X86MaterializeFPCraig Topper2017-10-292-2/+8
| | | | llvm-svn: 316853
* [analyzer] MisusedMovedObjectChecker: More precise warning messagePeter Szecsi2017-10-282-20/+66
| | | | | | | | | | | | Added new enum in order to differentiate the warning messages on "misusing" into 3 categories: function calls, moving an object, copying an object. (At the moment the checker gives the same message in case of copying and moving.) Additional test cases added as well. Differential Revision: https://reviews.llvm.org/D38674 llvm-svn: 316852
* [X86] Remove invalid code from LowerVSELECT.Craig Topper2017-10-281-4/+0
| | | | | | | | This code attempted to say that v8i16/v16i16 VSELECT is legal if BWI and VLX are enabled, but the only way we could reach this point is if the condition was not a vXi1 type. Which means it really wasn't legal. We don't have any tests that exercise this code. So I'm hoping it wasn't really reachable. llvm-svn: 316851
* [analyzer] MisusedMovedObjectChecker: Fix false positive on state-resetting, ↵Peter Szecsi2017-10-282-15/+34
| | | | | | | | | | | | | | | | | | | | handling method calls on base-class sub-objects An earlier solution from Artem r315301 solves the reset problem, however, the reports should be handled the same way in case of method calls. We should not just report the base class of the object where the method was defined but the whole object. Fixed false positive which came from not removing the subobjects in case of a state-resetting function. (Just replaced the State->remove(...) call to removeFromState(..) which was defined exactly for that purpose.) Some minor typos fixed in this patch as well which did not worth a whole new patch in my opinion, so included them here. Differential Revision: https://reviews.llvm.org/D31538 llvm-svn: 316850
* Fix ubsan error.Rui Ueyama2017-10-281-1/+1
| | | | | | | This patch fixes ubsan's "shift exponent 64 is too large for 32-bit type 'int'" error. llvm-svn: 316849
* Reduce sizeof(Symbol) from 104 bytes to 88 bytes.Rui Ueyama2017-10-283-9/+5
| | | | | | | Finding aliases for shared symbols doesn't need st_shndx because we can just compare st_value. llvm-svn: 316848
* [SelectionDAG] Add support for INSERT_SUBVECTOR to computeKnownBitsSimon Pilgrim2017-10-282-12/+42
| | | | llvm-svn: 316847
* Do not handle DefinedCommon symbols in the MapFile writer.Rui Ueyama2017-10-281-15/+4
| | | | | | | | Because of r314495 which converts DefinedCommon symbols to DefinedRegular symbols, common symbols are no longer reachable to the MapFile writer. So the code to handle common symbols is now dead. llvm-svn: 316846
* [X86][SSE] Combine 128-bit target shuffles to PACKSS/PACKUS.Simon Pilgrim2017-10-284-45/+39
| | | | llvm-svn: 316845
* [X86][SSE] Split off matchVectorShuffleWithPACK. NFCI.Simon Pilgrim2017-10-281-16/+41
| | | | | | Split matchVectorShuffleWithPACK from lowerVectorShuffleWithPACK so that we can reuse it for target shuffle combines llvm-svn: 316844
* Restore arch specific lastDwarfRegNum in builds without ↵Martin Storsjo2017-10-282-12/+18
| | | | | | | | | | | _LIBUNWIND_IS_NATIVE_ONLY This restores the previous behaviour of the Registers_* classes after SVN r316745. Differential Revision: https://reviews.llvm.org/D39382 llvm-svn: 316843
* Rename V -> Ver for readability.Rui Ueyama2017-10-281-6/+6
| | | | llvm-svn: 316842
* Pass symbol attributes instead of ElfSym to Shared symbol ctor.Rui Ueyama2017-10-2811-93/+56
| | | | | | | This change allows us to use less templates for Shared symbol and the functions that deals with shared symbols. llvm-svn: 316841
* [X86] Fix a mistake in the X86ISelDAGToDAG.cpp code for MUL8r/IMUL8r.Craig Topper2017-10-281-1/+1
| | | | | | I think this code is unreachable due to some promotions that occur elsewhere. I'll look into that to be sure, but for now I thought I should at least fix the obvious typo. llvm-svn: 316840
* [X86] Replace some default cases in X86SelectShift with llvm_unreachable.Craig Topper2017-10-281-3/+3
| | | | llvm-svn: 316839
* ADT: add a helper to check if the Triple is ARM64Saleem Abdulrasool2017-10-281-0/+5
| | | | | | | Add a trivial helper for checking if the architecture is AArch64 Little Endian or Big Endian. llvm-svn: 316837
* PR35039: Materialize temporary objects before wrapping them in anRichard Smith2017-10-283-27/+90
| | | | | | | | | OpaqueValueExpr in a GNU binary conditional expression. It's not meaningful for a non-materialized temporary object to be used as a common subexpression of multiple expressions. llvm-svn: 316836
* [SimplifyCFG] use pass options and remove the latesimplifycfg passSanjay Patel2017-10-2825-137/+187
| | | | | | | | | | | | | | | | | This is no-functional-change-intended. This is repackaging the functionality of D30333 (defer switch-to-lookup-tables) and D35411 (defer folding unconditional branches) with pass parameters rather than a named "latesimplifycfg" pass. Now that we have individual options to control the functionality, we could decouple when these fire (but that's an independent patch if desired). The next planned step would be to add another option bit to disable the sinking transform mentioned in D38566. This should also make it clear that the new pass manager needs to be updated to limit simplifycfg in the same way as the old pass manager. Differential Revision: https://reviews.llvm.org/D38631 llvm-svn: 316835
* [X86][SSE] Rename truncateVectorCompareWithPACKSS to ↵Simon Pilgrim2017-10-281-12/+11
| | | | | | | | truncateVectorWithPACKSS. NFC. We no longer rely on the vector source being a comparison result, just have sufficient sign bits. llvm-svn: 316834
* [X86] Correct the alignments on the aligned test cases in ↵Craig Topper2017-10-281-24/+24
| | | | | | fast-isel-vecload.ll to make sure they test selection of aligned loads. llvm-svn: 316833
* [clangd] Fix clang-tidy warnings.Benjamin Kramer2017-10-287-28/+19
| | | | | | No functionality change intended. llvm-svn: 316832
* [SelectionDAG] Support 'bit preserving' floating points bitcasts on ↵Simon Pilgrim2017-10-288-459/+355
| | | | | | | | | | | | computeKnownBits/ComputeNumSignBits For cases where we know the floating point representations match the bitcasted integer equivalent, allow bitcasting to these types. This is especially useful for the X86 floating point compare results which return all/zero bits but as a floating point type. Differential Revision: https://reviews.llvm.org/D39289 llvm-svn: 316831
* [analyzer] LoopUnrolling: check the bitwidth of the used numbers (pr34943)Peter Szecsi2017-10-282-2/+15
| | | | | | | | | | | | | | | The loop unrolling feature aims to track the maximum possible steps a loop can make. In order to implement this, it investigates the initial value of the counter variable and the bound number. (It has to be known.) These numbers are used as llvm::APInts, however, it was not checked if their bitwidths are the same which lead to some crashes. This revision solves this problem by extending the "shorter" one (to the length of the "longer" one). For the detailed bug report, see: https://bugs.llvm.org/show_bug.cgi?id=34943 Differential Revision: https://reviews.llvm.org/D38922 llvm-svn: 316830
* [X86] Add avx command lines to fast-isel-constpool.ll to improve coverage.Craig Topper2017-10-281-0/+26
| | | | llvm-svn: 316829
* [X86] Use update_llc_test_checks.py to regenerate fast-isel-constpool.llCraig Topper2017-10-281-8/+23
| | | | llvm-svn: 316828
* [X86] Add a fast-isel test for the i8 pseudo cmov.Craig Topper2017-10-281-0/+14
| | | | llvm-svn: 316827
* Basic: improve coverage for Darwin targets and fix ABISaleem Abdulrasool2017-10-282-4/+71
| | | | | | | | The existing coverage for the Darwin targets wasn't enough to catch all the variations. Improve the coverage a bit further and fix a few cases for Darwin targets. llvm-svn: 316826
* [X86] Remove unneeded MVT::i1 related code from fast isel.Craig Topper2017-10-281-10/+0
| | | | llvm-svn: 316825
* [ConstantFold] Fix a crash when folding a GEP that has vector indexHaicheng Wu2017-10-282-0/+12
| | | | | | | | | | LLVM crashes when factoring out an out-of-bound index into preceding dimension and the preceding dimension uses vector index. Simply bail out now when this case happens. Differential Revision: https://reviews.llvm.org/D38677 llvm-svn: 316824
* [X86] Add avx command lines to two fast-isel tests to get coverage of ↵Craig Topper2017-10-282-347/+761
| | | | | | | | selecting vucomiss/vucomisd. The selection of these shows up as a code coverage hole when looking at the llvm-cov link on llvm.org llvm-svn: 316823
* [X86] Use update_llc_test_checks.py to regenerate fast-isel-select-cmov2.llCraig Topper2017-10-281-99/+175
| | | | llvm-svn: 316822
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