summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Squelch unused variable warning in SIRegisterInfo.cpp.Matt Arsenault2015-12-011-1/+2
| | | | | | Patch by Justin Lebar llvm-svn: 254362
* llvm/test/DebugInfo/Generic/safestack-byval.ll is using tls.NAKAMURA Takumi2015-12-011-0/+2
| | | | llvm-svn: 254361
* check-llvm: Introduce the new feature "tls".NAKAMURA Takumi2015-12-011-0/+4
| | | | llvm-svn: 254360
* Fix use-after-free when a C++ thread_local variable gets replaced (because itsRichard Smith2015-12-017-32/+34
| | | | | | | type changes when the initializer is attached). Don't hold onto the GlobalVariable*; recompute it from the VarDecl* instead. llvm-svn: 254359
* [llvm-dwp] Add missing Makefile for the old configure+make buildDavid Blaikie2015-12-011-0/+18
| | | | llvm-svn: 254358
* [llvm-dwp] Add missing dependency from llvm tests on the llvm-dwp toolDavid Blaikie2015-12-011-0/+1
| | | | llvm-svn: 254357
* Fix a bug in MachineBlockPlacement that may cause assertion failure during ↵Cong Hou2015-12-011-3/+7
| | | | | | | | BranchProbability construction. The root cause is the rounding behavior in BranchProbability construction. We may consider to use truncation instead in the future. llvm-svn: 254356
* [llvm-dwp] Initial partial prototypeDavid Blaikie2015-12-019-1/+222
| | | | | | | | | | | | | | | | | | | This just concatenates the common DWP sections without doing any of the fancy DWP things like: 1) update str_offsets 2) deduplicating strings 3) merging/creating cu/tu_index Patches for these will follow shortly. (also not sure about target triple/object file type for this tool - do I really need a whole triple just to write an object file that contains purely static/hardcoded bytes in each section? & I guess I should just pick it based on the first input, maybe, rather than hardcoding for now - but we only produce .dwo on ELF platforms with objcopy for now anyway) llvm-svn: 254355
* llvm-dwp: Initial layoutDavid Blaikie2015-12-015-1/+40
| | | | llvm-svn: 254354
* [safestack] Protect byval function arguments.Evgeniy Stepanov2015-12-015-111/+241
| | | | | | | Detect unsafe byval function arguments and move them to the unsafe stack. llvm-svn: 254353
* Extend debug info for function parameters in SDAG.Evgeniy Stepanov2015-12-012-16/+102
| | | | | | | | | | | | | SDAG currently can emit debug location for function parameters when an llvm.dbg.declare points to either a function argument SSA temp, or to an AllocaInst. This change extends this logic by adding a fallback case when neither of the above is true. This is required for SafeStack, which may copy the contents of a byval function argument into something that is not an alloca, and then describe the target as the new location of the said argument. llvm-svn: 254352
* [safestack] Fix handling of array allocas.Evgeniy Stepanov2015-12-012-5/+65
| | | | | | | | The current code does not take alloca array size into account and, as a result, considers any access past the first array element to be unsafe. llvm-svn: 254350
* Fix a bug where one-lining display of child values would ignore the user's ↵Enrico Granata2015-12-011-1/+1
| | | | | | choice of format llvm-svn: 254349
* Replace all weight-based interfaces in MBB with probability-based ↵Cong Hou2015-12-0134-420/+292
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | interfaces, and update all uses of old interfaces. The patch in http://reviews.llvm.org/D13745 is broken into four parts: 1. New interfaces without functional changes (http://reviews.llvm.org/D13908). 2. Use new interfaces in SelectionDAG, while in other passes treat probabilities as weights (http://reviews.llvm.org/D14361). 3. Use new interfaces in all other passes. 4. Remove old interfaces. This patch is 3+4 above. In this patch, MBB won't provide weight-based interfaces any more, which are totally replaced by probability-based ones. The interface addSuccessor() is redesigned so that the default probability is unknown. We allow unknown probabilities but don't allow using it together with known probabilities in successor list. That is to say, we either have a list of successors with all known probabilities, or all unknown probabilities. In the latter case, we assume each successor has 1/N probability where N is the number of successors. An assertion checks if the user is attempting to add a successor with the disallowed mixed use as stated above. This can help us catch many misuses. All uses of weight-based interfaces are now updated to use probability-based ones. Differential revision: http://reviews.llvm.org/D14973 llvm-svn: 254348
* This reverts commit r254336 and r254344.Rafael Espindola2015-11-306-112/+80
| | | | | | They broke a bot and I am debugging why. llvm-svn: 254347
* [PR25661] Revert part of r217213 according to r254323.NAKAMURA Takumi2015-11-301-13/+2
| | | | llvm-svn: 254346
* Remove extraneous parentheses.Rui Ueyama2015-11-301-1/+1
| | | | llvm-svn: 254345
* Disable a consistency check.Rafael Espindola2015-11-303-27/+1
| | | | | | Trying to figure out why it fails on a bot but passes locally. llvm-svn: 254344
* Remove non-debug printing of domain setTobias Grosser2015-11-301-1/+0
| | | | | | | | Contributed-by: Chris Jenneisch <chrisj@codeaurora.org> Differential Revision: http://reviews.llvm.org/D15094 llvm-svn: 254343
* [InstCombine] add tests to show potential vector IR shuffle transformsSanjay Patel2015-11-301-5/+48
| | | | llvm-svn: 254342
* Unpack the output on the client, completing the cycle.Zachary Turner2015-11-304-39/+89
| | | | llvm-svn: 254341
* Have swig_bot actually run swig, and send back the output.Zachary Turner2015-11-304-36/+74
| | | | llvm-svn: 254340
* [X86][FMA4] Prefer FMA4 to FMASimon Pilgrim2015-11-304-6/+7
| | | | | | | | | | | | | | | | We currently output FMA instructions on targets which support both FMA4 + FMA (i.e. later Bulldozer CPUS bdver2/bdver3/bdver4). This patch flips this so FMA4 is preferred; this is for several reasons: 1 - FMA4 is non-destructive reducing the need for mov instructions. 2 - Its more straighforward to commute and fold inputs (although the recent work on FMA has reduced this difference). 3 - All supported targets have FMA4 performance equal or better to FMA - Piledriver (bdver2) in particular has half the throughput when executing FMA instructions. Its looks like no future AMD processor lines will support FMA4 after the Bulldozer series so we're not causing problems for later CPUs. Differential Revision: http://reviews.llvm.org/D14997 llvm-svn: 254339
* Fix hang in global static initializationAdrian McCarthy2015-11-301-4/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D15092 llvm-svn: 254338
* [libFuzzer] clarify the limitation of fsanitize-coverage=trace-cmpKostya Serebryany2015-11-301-0/+1
| | | | llvm-svn: 254337
* Start deciding earlier what to link.Rafael Espindola2015-11-308-80/+138
| | | | | | | | | | | | | | | | | | | | | | A traditional linker is roughly split in symbol resolution and "copying stuff". The two tasks are badly mixed in lib/Linker. This starts splitting them apart. With this patch there are no direct call to linkGlobalValueBody or linkGlobalValueProto. Everything is linked via WapValue. This also includes a few fixes: * A GV goes undefined if the comdat is dropped (comdat11.ll). * We error if an internal GV goes undefined (comdat13.ll). * We don't link an unused comdat. The first two match the behavior of an ELF linker. The second one is equivalent to running globaldce on the input. llvm-svn: 254336
* Have 'optnone' respect the -fast-isel=false option.Paul Robinson2015-11-306-10/+24
| | | | | | | | This is primarily useful for debugging optnone v. ISel issues. Differential Revision: http://reviews.llvm.org/D14792 llvm-svn: 254335
* [X86] Update test/CodeGen/X86/avg.ll with the help of ↵Cong Hou2015-11-301-250/+347
| | | | | | update_llc_test_checks.py. NFC. llvm-svn: 254334
* AMDGPU: Fix unused functionMatt Arsenault2015-11-301-5/+0
| | | | llvm-svn: 254333
* AMDGPU: Error if too many user SGPRs usedMatt Arsenault2015-11-302-0/+8
| | | | llvm-svn: 254332
* AMDGPU: Rework how private buffer passed for HSAMatt Arsenault2015-11-3021-297/+1000
| | | | | | | | | | | | | | | | If we know we have stack objects, we reserve the registers that the private buffer resource and wave offset are passed and use them directly. If not, reserve the last 5 SGPRs just in case we need to spill. After register allocation, try to pick the next available registers instead of the last SGPRs, and then insert copies from the inputs to the reserved registers in the progloue. This also only selectively enables all of the input registers which are really required instead of always enabling them. llvm-svn: 254331
* AMDGPU: Rename enums to be consistent with HSA code object terminologyMatt Arsenault2015-11-305-50/+49
| | | | llvm-svn: 254330
* AMDGPU: Remove SIPrepareScratchRegsMatt Arsenault2015-11-3019-281/+827
| | | | | | | | | | | | | | | | | | | | | | It does not work because of emergency stack slots. This pass was supposed to eliminate dummy registers for the spill instructions, but the register scavenger can introduce more during PrologEpilogInserter, so some would end up left behind if they were needed. The potential for spilling the scratch resource descriptor and offset register makes doing something like this overly complicated. Reserve registers to use for the resource descriptor and use them directly in eliminateFrameIndex. Also removes creating another scratch resource descriptor when directly selecting scratch MUBUF instructions. The choice of which registers are reserved is temporary. For now it attempts to pick the next available registers after the user and system SGPRs. llvm-svn: 254329
* AMDGPU: Use assert zext for workgroup sizesMatt Arsenault2015-11-303-10/+84
| | | | llvm-svn: 254328
* ScopInfo: Further simplify codeTobias Grosser2015-11-301-2/+1
| | | | | | | | Acc==MA implies Acc->getAccessInstruction() == MA->getAccessInstruction(). Suggested as post-commit review for 254305 by Michael Kruse. llvm-svn: 254327
* ELF: Make comments consistent.Rui Ueyama2015-11-301-7/+0
| | | | | | | In other places, we don't have the comment. Absence of check{Int,UInt} is the sign that no overflow check is needed. llvm-svn: 254326
* [ARM] For old thumb ISA like v4t, we cannot use PC directly in pop.Quentin Colombet2015-11-302-22/+28
| | | | | | Fix the epilogue emission to account for that. llvm-svn: 254325
* Avoid writing to source directory of testsReid Kleckner2015-11-301-1/+1
| | | | llvm-svn: 254324
* [MS Compat] Adjust thiscall to cdecl when deducing template argumentsDavid Majnemer2015-11-302-2/+24
| | | | | | | | | | Function types can be extracted from member pointer types. However, the type is not appropriate without first adjusting the calling convention. This fixes PR25661. llvm-svn: 254323
* Fix honoring of OMP_THREAD_LIMIT in the teams constructJonathan Peyton2015-11-301-7/+36
| | | | | | | | | | | | Fix for crash in the teams construct in case user sets OMP_THREAD_LIMIT to a number less than the number of processors. Now the number of threads will be silently reduced if the user didn't specify teams parameters or with a warning if the user specified teams parameters conflicting with OMP_THREAD_LIMIT. Differential Revision: http://reviews.llvm.org/D14732 llvm-svn: 254322
* Fix crash when __kmp_task_team_setup called for single threaded teamJonathan Peyton2015-11-301-20/+21
| | | | | | | | | | | The task_team pointer is dereferenced unconditionally which causes a SEGFAULT when it is NULL (e.g. for serialized parallel, that can happen for "teams" construct or for "target nowait"). The solution is to skip second task team setup for single thread team. Differential Revision: http://reviews.llvm.org/D14729 llvm-svn: 254321
* Adding Hwloc library option for affinity mechanismJonathan Peyton2015-11-3018-138/+789
| | | | | | | | | | | | | | | | | | | These changes allow libhwloc to be used as the topology discovery/affinity mechanism for libomp. It is supported on Unices. The code additions: * Canonicalize KMP_CPU_* interface macros so bitmask operations are implementation independent and work with both hwloc bitmaps and libomp bitmaps. So there are new KMP_CPU_ALLOC_* and KMP_CPU_ITERATE() macros and the like. These are all in kmp.h and appropriately placed. * Hwloc topology discovery code in kmp_affinity.cpp. This uses the hwloc interface to create a libomp address2os object which the rest of libomp knows how to handle already. * To build, use -DLIBOMP_USE_HWLOC=on and -DLIBOMP_HWLOC_INSTALL_DIR=/path/to/install/dir [default /usr/local]. If CMake can't find the library or hwloc.h, then it will tell you and exit. Differential Revision: http://reviews.llvm.org/D13991 llvm-svn: 254320
* [compiler-rt] Remove SANITIZER_AARCH64_VMA usageAdhemerval Zanella2015-11-3014-75/+30
| | | | | | | | | | | | This patch complete removed SANITIZER_AARCH64_VMA definition and usage. AArch64 ports now supports runtime VMA detection and instrumentation for 39 and 42-bit VMA. It also Rewrite print_address to take a variadic argument list (the addresses to print) and adjust the tests which uses it to the new signature. llvm-svn: 254319
* [SimplifyLibCalls] Remove useless bits of this tests.Davide Italiano2015-11-301-6/+6
| | | | llvm-svn: 254318
* [SimplifyLibCalls] Transform log(exp2(y)) to y*log(2) under fast-math.Davide Italiano2015-11-303-1/+35
| | | | llvm-svn: 254317
* [CMake] Moving -fvisibility-inlines-hidden append as per post-commit reviewChris Bieneman2015-11-302-1/+1
| | | | | | Thanks Alexey. llvm-svn: 254316
* [X86] Add RIP to GR64_TCW64David Majnemer2015-11-303-2/+18
| | | | | | | | | The MachineVerifier wants to check that the register operands of an instruction belong to the instruction's register class. RIP-relative control flow instructions violated this by referencing RIP. While this was fixed for SysV, it was never fixed for Win64. llvm-svn: 254315
* Enable shrink wrapping for PPC64Kit Barton2015-11-302-7/+14
| | | | | | | | | | | Re-enable shrink wrapping for PPC64 Little Endian. One minor modification to PPCFrameLowering::findScratchRegister was necessary to handle fall-thru blocks (blocks with no terminator) correctly. Tested with all LLVM test, clang tests, and the self-hosting build, with no problems found. PHabricator: http://reviews.llvm.org/D14778 llvm-svn: 254314
* Fix another llvm.ctors merging bug.Rafael Espindola2015-11-303-2/+18
| | | | | | | We were not looking past casts to see if an element should be included or not. llvm-svn: 254313
* [WebAssembly] Fix a few minor compiler warnings. NFC.Dan Gohman2015-11-301-7/+7
| | | | llvm-svn: 254311
OpenPOWER on IntegriCloud