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* Hexagon: Rename Register classMatt Arsenault2019-06-241-32/+33
| | | | | | This avoids a naming conflict in a future patch. llvm-svn: 364188
* [InstCombine] reduce funnel-shift i16 X, X, 8 to bswap XSanjay Patel2019-06-242-3/+16
| | | | | | | | | | Prefer the more exact intrinsic to remove a use of the input value and possibly make further transforms easier (we will still need to match patterns with funnel-shift of wider types as pieces of bswap, especially if we want to canonicalize to funnel-shift with constant shift amount). Discussed in D46760. llvm-svn: 364187
* AMDGPU/GlobalISel: Fix RegBankSelect for s1 sext/zext/anyextMatt Arsenault2019-06-244-24/+768
| | | | | | | | This needs different handling if the source is known to be a valid condition or not. Handle turning it into shifts or a select during regbankselect. llvm-svn: 364186
* AMDGPU: Fold frame index into MUBUFMatt Arsenault2019-06-247-20/+256
| | | | | | | | | | | | | | | | This matters for byval uses outside of the entry block, which appear as copies. Previously, the only folding done was during selection, which could not see the underlying frame index. For any uses outside the entry block, the frame index was materialized in the entry block relative to the global scratch wave offset. This may produce worse code in cases where the offset ends up not fitting in the MUBUF offset field. A better heuristic would be helpfu for extreme frames. llvm-svn: 364185
* [InstCombine] add tests for funnel-shift to bswap; NFCSanjay Patel2019-06-241-0/+37
| | | | llvm-svn: 364184
* [CUDA][HIP] Don't set comdat attribute for CUDA device stub ↵Konstantin Pyzhov2019-06-241-0/+5
| | | | | | functions.\nDifferential Revision: https://reviews.llvm.org/D63277 llvm-svn: 364183
* AMDGPU: Cleanup checking when spills need emergency slotsMatt Arsenault2019-06-241-7/+6
| | | | | | Address fixme, which should no longer be a problem since r363757. llvm-svn: 364182
* [InstCombine] SliceUpIllegalIntegerPHI - bail on out of range shiftsSimon Pilgrim2019-06-242-0/+31
| | | | | | | | trunc(lshr) handling - if the shift is out of range (undefined) then bail like we do for non-constant shifts. Fixes OSS Fuzz #15217 llvm-svn: 364181
* [clangd] Improve SelectionTree string representationSam McCall2019-06-241-1/+12
| | | | llvm-svn: 364180
* [DAGCombine] visitMUL - allow shift by zero in MulByConstant.Simon Pilgrim2019-06-242-6/+30
| | | | | | | | This can occur under certain circumstances when undefs are created later on in the constant multipliers (e.g. in this case due to SimplifyDemandedVectorElts). Its better to let the shift by zero to occur and perform any cleanup afterward. Fixes OSS Fuzz #15429 llvm-svn: 364179
* [ConstantFolding] Use hasVectorInstrinsicScalarOpd. NFCBjorn Pettersson2019-06-241-16/+13
| | | | | | | | | | | | | | | | | | Summary: Use the hasVectorInstrinsicScalarOpd helper function in ConstantFoldVectorCall. Reviewers: rengolin, RKSimon, dblaikie Reviewed By: rengolin, RKSimon Subscribers: tschuett, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63705 llvm-svn: 364178
* [Scalarizer] Add scalarizer support for smul.fix.satBjorn Pettersson2019-06-243-10/+26
| | | | | | | | | | | | | | | | | | | | | | | Summary: Handle smul.fix.sat in the scalarizer. This is done by adding smul.fix.sat to the set of "isTriviallyVectorizable" intrinsics. The addition of smul.fix.sat in isTriviallyVectorizable and hasVectorInstrinsicScalarOpd can also be seen as a preparation to be able to use hasVectorInstrinsicScalarOpd in ConstantFolding. Reviewers: rengolin, RKSimon, dblaikie Reviewed By: rengolin Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63704 llvm-svn: 364177
* [docs][llvm-nm] Add missing options to documentationJames Henderson2019-06-241-21/+91
| | | | | | | | | | | | | | There were several options missing from the documentation. This patch adds them as well as improving some wording and separating the Mach-O only options into a separate section. Fixes https://bugs.llvm.org/show_bug.cgi?id=42234. Reviewed by: MaskRay Differential Revision: https://reviews.llvm.org/D63655 llvm-svn: 364176
* [sancov] Avoid unnecessary unique_ptrFangrui Song2019-06-241-12/+10
| | | | llvm-svn: 364175
* [OpenCL] Restore ATOMIC_VAR_INITSven van Haastregt2019-06-242-1/+10
| | | | | | | | | We accidentally lost the ATOMIC_VAR_INIT and ATOMIC_FLAG_INIT macros in r363794. Also put the `memory_order` typedef back inside a `>= CL2.0` guard. llvm-svn: 364174
* [OpenCL] Remove more duplicates from opencl-c.hSven van Haastregt2019-06-241-29/+0
| | | | | | | | Identified the duplicate declarations using sort lib/Headers/opencl-c.h | uniq -c | grep ' 2' llvm-svn: 364173
* [ARM] Add MVE interleaving load/store family.Simon Tatham2019-06-249-33/+809
| | | | | | | | | | | | | | | | | | This adds the family of loads and stores with names like VLD20.8 and VST42.32, which load and store parts of multiple q-registers in such a way that executing both VLD20 and VLD21, or all four of VLD40..VLD43, will distribute 2 or 4 vectors' worth of memory data across the lanes of the same number of registers but in a transposed order. In addition to the Tablegen descriptions of the instructions themselves, this patch also adds encode and decode support for the QQPR and QQQQPR register classes (representing the range of loaded or stored vector registers), and tweaks to the parsing system for lists of vector registers to make it return the right format in this case (since, unlike NEON, MVE regards q-registers as primitive, and not just an alias for two d-registers). llvm-svn: 364172
* [docs][llvm-nm] Improve symbol code documentationJames Henderson2019-06-241-15/+70
| | | | | | | | | | | | | | The existing symbol code documentation was very incomplete. This patch adds the missing codes, and defines them based on the current code behaviour. Fixes https://bugs.llvm.org/show_bug.cgi?id=42231. Reviewed by: rupprecht, mtrent, MaskRay Differential Revision: https://reviews.llvm.org/D63327 llvm-svn: 364171
* [libcxx] [test] Read files as bytestrings to fix py3 encoding issuesMichal Gorny2019-06-241-6/+8
| | | | | | | | | | | | | | | | Use binary mode to read test files in libcxx LibcxxTestFormat class. This ensures that tests are read correctly independently of encoding, and therefore fixes UnicodeDecodeError when file is opened in Python 3 that defaults to pure ASCII encoding. Technically this could be also fixed via conditionally appending encoding argument when opening the file in Python 3. However, since the code in question only searches for fixed ASCII substrings reading it in binary mode is simpler and more universal. Differential Revision: https://reviews.llvm.org/D63346 llvm-svn: 364170
* [Support] Fix error handling in DataExtractor::get[US]LEB128Pavel Labath2019-06-242-14/+24
| | | | | | | | | | | | | | | | | | | | | | | Summary: These functions are documented as not modifying the offset argument if the extraction fails (just like other DataExtractor functions). However, while reviewing D63591 we discovered that this is not the case -- if the function reaches the end of the data buffer, it will just return the value parsed until that point and set offset to point to the end of the buffer. This fixes the functions to act as advertised, and adds a regression test. Reviewers: dblaikie, probinson, bkramer Subscribers: kristina, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63645 llvm-svn: 364169
* Follow up of rL363913. NFC.Sjoerd Meijer2019-06-241-5/+7
| | | | | | | Minor reshuffle in AArch64 targetparser unittest, solving a potential problem with querying iterators too early. llvm-svn: 364168
* [llvm-readobj/llvm-readelf] - Eliminate the elf-groups.x86_64 precompiled ↵George Rimar2019-06-243-62/+80
| | | | | | | | | | | | | | | | binary from the inputs. We do not need the elf-groups.x86_64. In one of the tests, it was used for no solid reason, and for the second test case we can use YAML input with SHT_GROUP sections. The patch performs a cleanup of one of the test cases, removes another one completely (since during the review was found out it actually duplicates one of the existent tests) and removes the precompiled binary. Differential revision: https://reviews.llvm.org/D63647 llvm-svn: 364167
* PR42362: Fix auto deduction of template parameter packs fromRichard Smith2019-06-242-1/+19
| | | | | | | | | type-dependent argument packs. We need to strip off the PackExpansionExpr to get the real (dependent) type rather than an opaque DependentTy. llvm-svn: 364165
* [ELF][PPC][X86] Use [-2**(n-1), 2**n) to check overflows for R_PPC_ADDR16, ↵Fangrui Song2019-06-2424-114/+110
| | | | | | | | | | | | | | | | | | | | | R_PPC64_ADDR{16,32}, R_X86_64_{8,16} Similar to R_AARCH64_ABS32, R_PPC64_ADDR32 can represent either a signed value or unsigned value, thus we should use `[-2**(n-1), 2**n)` instead of `[-2**(n-1), 2**(n-1))` to check overflows. The issue manifests as a bogus linker error when linking the powerpc64le Linux kernel. The new behavior is compatible with ld.bfd's complain_overflow_bitfield. The upper bound of the error message is not correct. Fix it as well. The changes to R_PPC_ADDR16, R_PPC64_ADDR16, R_X86_64_8 and R_X86_64_16 are similar. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D63690 llvm-svn: 364164
* [X86] Turn v16i16->v16i8 truncate+store into a any_extend+truncstore if we ↵Craig Topper2019-06-236-15/+22
| | | | | | | | | | | | | | | | avx512f, but not avx512bw. Ideally we'd be able to represent this truncate as a any_extend to v16i32 and a truncate, but SelectionDAG doens't know how to not fold those together. We have isel patterns to use a vpmovzxwd+vpdmovdb for the truncate, but we aren't able to simultaneously fold the load and the store from the isel pattern. By pulling the truncate into the store we can successfully hide it from the DAG combiner. Then we can isel pattern match the truncstore and load+any_extend separately. llvm-svn: 364163
* [GN] Generation failure caused by trailing space in file namePetr Hosek2019-06-231-1/+1
| | | | | | | | | | | | | | | | | | When I executed gn.py gen out/gn I got the following error: ERROR at //compiler-rt/lib/builtins/BUILD.gn:162:7: Only source, header, and object files belong in the sources of a static_library. //compiler-rt/lib/builtins/emutls.c is not one of the valid types. "emutls.c ", ^---------- See //compiler-rt/lib/BUILD.gn:3:5: which caused the file to be included. "//compiler-rt/lib/builtins", ^--------------------------- It turns out to be that the latest gn doesn't accept ill-format file name. And the emutls.c above has a trailing space. Remove the trailing space should work. Patch By: myhsu Differential Revision: https://reviews.llvm.org/D63449 llvm-svn: 364162
* Use C++11 implementation of unique_ptr in C++03.Eric Fiselier2019-06-232-161/+51
| | | | llvm-svn: 364161
* Apply new meta-programming traits throughout the library.Eric Fiselier2019-06-238-261/+179
| | | | | | The new meta-programming primitives are lower cost than the old versions. This patch removes those old versions and switches libc++ to use the new ones. llvm-svn: 364160
* Fix typo in comment; NFCSanjoy Das2019-06-231-1/+1
| | | | llvm-svn: 364159
* [X86] Fix isel pattern that was looking for a bitcasted load. Remove what ↵Craig Topper2019-06-231-13/+1
| | | | | | | | | | appears to be a copy/paste mistake. DAG combine should ensure bitcasts of loads don't exist. Also remove 3 patterns that are identical to the block above them. llvm-svn: 364158
* Fix test for 32-bit targets.Richard Smith2019-06-231-4/+4
| | | | llvm-svn: 364157
* [Tests] Autogen and improve test readabilityPhilip Reames2019-06-231-46/+95
| | | | llvm-svn: 364156
* [IndVars] Remove dead instructions after folding trivial loop exitPhilip Reames2019-06-234-19/+7
| | | | | | In rL364135, I taught IndVars to fold exiting branches in loops with a zero backedge taken count (i.e. loops that only run one iteration). This extends that to eliminate the dead comparison left around. llvm-svn: 364155
* SlotIndexes: delete unused functionsFangrui Song2019-06-232-71/+0
| | | | llvm-svn: 364154
* [InstCombine] squash is-power-of-2 that uses ctpopSanjay Patel2019-06-232-10/+39
| | | | | | | | | | | | | | | This is another intermediate IR step towards solving PR42314: https://bugs.llvm.org/show_bug.cgi?id=42314 We can test if a value is power-of-2-or-0 using ctpop(X) < 2, so combining that with a non-zero check of the input is the same as testing if exactly 1 bit is set: (X != 0) && (ctpop(X) u< 2) --> ctpop(X) == 1 Differential Revision: https://reviews.llvm.org/D63660 llvm-svn: 364153
* SlotIndexes: simplify IdxMBBPair operatorsFangrui Song2019-06-232-17/+4
| | | | llvm-svn: 364152
* [SelectionDAG] Remove the code that attempts to calculate the alignment for ↵Craig Topper2019-06-232-27/+4
| | | | | | | | | | | | | | the second half of a split masked load/store. The code divides the alignment by 2 if the original alignment is equal to the original VT size. But this wouldn't be correct if the alignment was larger than the VT size. The memory operand object already takes care of calling MinAlign on the base alignment and the memory pointer offset. So we don't need any special code at all. llvm-svn: 364151
* [X86][SelectionDAG] Cleanup and simplify masked_load/masked_store in ↵Craig Topper2019-06-234-61/+37
| | | | | | | | | | | | | | | | | | | | tablegen. Use more precise PatFrags for scalar masked load/store. Rename masked_load/masked_store to masked_ld/masked_st to discourage their direct use. We need to check truncating/extending and compressing/expanding before using them. This revealed that our scalar masked load/store patterns were misusing these. With those out of the way, renamed masked_load_unaligned and masked_store_unaligned to remove the "_unaligned". We didn't check the alignment anyway so the name was somewhat misleading. Make the aligned versions inherit from masked_load/store instead from a separate identical version. Merge the 3 different alignments PatFrags into a single version that uses the VT from the SDNode to determine the size that the alignment needs to match. llvm-svn: 364150
* Disable test by defaultEric Fiselier2019-06-231-1/+1
| | | | llvm-svn: 364149
* Add super fast _IsSame trait for internal use.Eric Fiselier2019-06-232-11/+77
| | | | | | | | | Clang provides __is_same that doesn't produce any instantiations and just returns a bool. It's a lot faster than using std::is_same I'll follow up with a patch to actually start using it. llvm-svn: 364148
* Revert "builtins: relax __iso_volatile_{load,store}32"Saleem Abdulrasool2019-06-232-19/+2
| | | | | | | This reverts commit SVN r364137. This seems to be cause problems with casting in C. llvm-svn: 364147
* Add noexcept throughout <atomic>Eric Fiselier2019-06-231-28/+28
| | | | | | | | | | | The CMake CheckLibcxxAtomic module was always failing to compile the example, even when libatomic wasn't needed. This was caused because the check doesn't link a C++ runtime library to provide std::terminate, which is required for exception support. The check is still really broken, but <atomic> is better! llvm-svn: 364146
* MSVC visualizers for type aliasesMike Spertus2019-06-231-0/+51
| | | | | | | For example, the following TypeAliasTemplateDecl now displays in the autos window as template<class T> using type_identity_t = type_identity<T>::type; llvm-svn: 364145
* Fix placement of -Wno-ignored-attributesEric Fiselier2019-06-231-2/+3
| | | | llvm-svn: 364144
* [Support] Fix build under EmscriptenKeno Fischer2019-06-231-0/+3
| | | | | | | | | | | | | | | Summary: Emscripten's libc doesn't define MNT_LOCAL, thus causing a build failure in the fallback path. However, to the best of my knowledge, it also doesn't support remote file system mounts, so we may simply return `true` here (as we do for e.g. Fuchsia). With this fix, the core LLVM libraries build correctly under emscripten (though some of the tools and utils do not). Reviewers: kripken Differential Revision: https://reviews.llvm.org/D63688 llvm-svn: 364143
* Disable -Wignored-attributes for nowEric Fiselier2019-06-231-0/+1
| | | | llvm-svn: 364142
* Revert [CommandLine] Remove OptionCategory and SubCommand caches from the ↵Don Hinton2019-06-223-118/+95
| | | | | | | | | | | | | Option class. This reverts r364134 (git commit a5b83bc9e3b8e8945b55068c762bd6c73621a4b0) Caused errors in the asan bot, so the GeneralCategory global needs to be changed to ManagedStatic. Differential Revision: https://reviews.llvm.org/D62105 llvm-svn: 364141
* Fix TBAA representation for zero-sized fields and unnamed bit-fields.Richard Smith2019-06-224-8/+28
| | | | | | | | | | | | | | | Unnamed bit-fields should not be represented in the TBAA metadata because they do not represent storage fields (they only affect layout). Zero-sized fields should not be represented in the TBAA metadata because by definition they have no associated storage (so we will never emit a load or store through them), and they might not appear in declaration order within the struct layout. Fixes a verifier failure when emitting a TBAA-enabled load through a class type containing a zero-sized field. llvm-svn: 364140
* Remove reliance on toCharUnitsFromBits rounding down.Richard Smith2019-06-221-1/+2
| | | | llvm-svn: 364139
* Natural MSVC visualization of constructorsMike Spertus2019-06-221-1/+6
| | | | | | | E.g., Allow MSVC to visualize a CXXConstructorDecl like Constructor { Y(type_identity_t<T>)} llvm-svn: 364138
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