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| author | Craig Topper <craig.topper@intel.com> | 2019-06-23 19:17:50 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-06-23 19:17:50 +0000 |
| commit | c8d94e78899b5aa5e32764edba00b6b060c49d42 (patch) | |
| tree | a594a251799f00b480c7af227179c99c12d9f876 | |
| parent | 9bc3141dc2d236e8c0c26cb4ac16ce833bc2c680 (diff) | |
| download | bcm5719-llvm-c8d94e78899b5aa5e32764edba00b6b060c49d42.tar.gz bcm5719-llvm-c8d94e78899b5aa5e32764edba00b6b060c49d42.zip | |
[X86] Fix isel pattern that was looking for a bitcasted load. Remove what appears to be a copy/paste mistake.
DAG combine should ensure bitcasts of loads don't exist.
Also remove 3 patterns that are identical to the block above them.
llvm-svn: 364158
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 48da35f11a2..e1516dd745c 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -9797,19 +9797,7 @@ defm : AVX512_pmovx_patterns<"VPMOVZX", zext, zext_invec>; let Predicates = [HasAVX512, NoBWI] in { def: Pat<(v16i8 (trunc (v16i16 VR256X:$src))), (VPMOVDBZrr (v16i32 (VPMOVZXWDZrr VR256X:$src)))>; -def: Pat<(v16i8 (trunc (bc_v16i16 (loadv4i64 addr:$src)))), - (VPMOVDBZrr (v16i32 (VPMOVZXWDZrm addr:$src)))>; -def: Pat<(store (v16i8 (trunc (v16i16 VR256X:$src))), addr:$dst), - (VPMOVDBZmr addr:$dst, (v16i32 (VPMOVZXWDZrr VR256X:$src)))>; -} - -// Without BWI we can't do a trunc from v16i16 to v16i8. DAG combine can merge -// ext+trunc aggresively making it impossible to legalize the DAG to this -// pattern directly. -let Predicates = [HasAVX512, NoBWI] in { -def: Pat<(v16i8 (trunc (v16i16 VR256X:$src))), - (VPMOVDBZrr (v16i32 (VPMOVZXWDZrr VR256X:$src)))>; -def: Pat<(v16i8 (trunc (bc_v16i16 (loadv4i64 addr:$src)))), +def: Pat<(v16i8 (trunc (loadv16i16 addr:$src))), (VPMOVDBZrr (v16i32 (VPMOVZXWDZrm addr:$src)))>; def: Pat<(store (v16i8 (trunc (v16i16 VR256X:$src))), addr:$dst), (VPMOVDBZmr addr:$dst, (v16i32 (VPMOVZXWDZrr VR256X:$src)))>; |
