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* Fix a -Wpedantic warning.Haojian Wu2017-10-231-1/+1
| | | | llvm-svn: 316315
* [rename] Don't overwrite the template argument when renaming a template ↵Haojian Wu2017-10-232-1/+25
| | | | | | | | | | | | | | function. Reviewers: ioeric Reviewed By: ioeric Subscribers: cierpuchaw, cfe-commits, klimek Differential Revision: https://reviews.llvm.org/D39120 llvm-svn: 316314
* [ARM] Allow unrolling of multi-block loops.Sam Parker2017-10-232-16/+351
| | | | | | | | | | | Before, loop unrolling was only enabled for loops with a single block. This restriction has been removed and replaced by: - allow a maximum of two exiting blocks, - a four basic block limit for cores with a branch predictor. Differential Revision: https://reviews.llvm.org/D38952 llvm-svn: 316313
* [clangd] Report proper kinds for 'Keyword' and 'Snippet' completion items.Ilya Biryukov2017-10-232-3/+56
| | | | | | | | | | | | Reviewers: rwols, malaperle, krasimir, bkramer, sammccall Reviewed By: rwols, sammccall Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D38720 llvm-svn: 316311
* For better compatibility with C++11 and C++14, emit a nondiscardable definitionRichard Smith2017-10-232-7/+17
| | | | | | | of a static constexpr data member if it's defined 'constexpr' out of line, not only if it's defined 'constexpr' in the class. llvm-svn: 316310
* [X86] Update a doxygen comment in the disassembler tablegen code. NFCCraig Topper2017-10-231-0/+1
| | | | llvm-svn: 316309
* [X86] Fix disassembly of EVEX rounding control and SAE instructions.Craig Topper2017-10-238-57/+252
| | | | | | Fixes PR31955. llvm-svn: 316308
* [ELF] When placing orphans, handle case when last section is deadPetr Hosek2017-10-232-6/+33
| | | | | | | | | | | | | | | r315292 introduced a change that's supposed to consistently ignore "dead" output sections when placing orphans. Unfortunately, that change doesn't handle the special case when the orphan section is second to last section and the last section is dead (e.g. because it's being discarded) introducing a regression in some cases. This change handles this case by using the same predicate when checking the last section. Differential Revision: https://reviews.llvm.org/D39172 llvm-svn: 316307
* Add R_PPC_ADDR16_HI relocation supportRui Ueyama2017-10-222-5/+22
| | | | | | | | | | The support of R_PPC_ADDR16_HI improves ld compatibility and makes things on par with RuntimeDyldELF that already implements this relocation. Patch by vit9696. llvm-svn: 316306
* Remove a fast lookup table from MergeInputSection.Rui Ueyama2017-10-222-20/+2
| | | | | | | | | | | | | | We used to have a map from section piece offsets to section pieces as a cache for binary search. But I found that the map took quite a large amount of memory and didn't make linking faster. So, in this patch, I removed the map. This patch saves 566 MiB of RAM (2.019 GiB -> 1.453 GiB) when linking clang with debug info, and the link time is 4% faster in that test case. Thanks for Sean Silva for pointing this out. llvm-svn: 316305
* [c++2a] Update cxx_status w __VA_OPT__ marked as completed in SVN.Faisal Vali2017-10-221-1/+1
| | | | llvm-svn: 316304
* ExecutionEngine: make COFF Thumb2 assertions non-tautologicalSaleem Abdulrasool2017-10-221-25/+11
| | | | | | | | | The overflow detection assertions were tautological due to truncation. Adjust them to no longer be tautological. Patch by Alex Langford! llvm-svn: 316303
* Fix invalid ptrtoint in InstCombineYichao Yu2017-10-222-2/+49
| | | | | | | | | | | | | | | | | | | Summary: It's unclear if this is the only thing we can do but at least this is consistent with the check of address space agreement in `isBitCastable`. The code is used at least in both instcombine and jumpthreading though I could only find a way to trigger the invalid cast in instcombine. Reviewers: loladiro, sanjoy, majnemer Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34335 llvm-svn: 316302
* Create fewer copies of StringMaps. No functionality change intended.Benjamin Kramer2017-10-223-3/+3
| | | | llvm-svn: 316301
* Make HIDDEN_DIRECTIVE a function-like macro. NFCI.Martin Storsjo2017-10-221-16/+9
| | | | | | | | | | This avoids a hack for making it a no-op for windows. Also explicitly check for _WIN32 instead of assuming it. Differential Revision: https://reviews.llvm.org/D39156 llvm-svn: 316300
* [X86] Add missing override. NFC.Benjamin Kramer2017-10-221-3/+1
| | | | llvm-svn: 316299
* [SimplifyCFG] delay switch condition forwarding to -latesimplifycfgSanjay Patel2017-10-224-10/+18
| | | | | | | | | | | As discussed in D39011: https://reviews.llvm.org/D39011 ...replacing constants with a variable is inverting the transform done by other IR passes, so we definitely don't want to do this early. In fact, it's questionable whether this transform belongs in SimplifyCFG at all. I'll look at moving this to codegen as a follow-up step. llvm-svn: 316298
* [utils] Support -mtriple=powerpc64Fangrui Song2017-10-221-2/+3
| | | | | | | | | | Summary: test/CodeGen/PowerPC/pr33093.ll uses both powerpc64 (big-endian) and powerpc64le while the former was unsupported. Subscribers: nemanjai Differential Revision: https://reviews.llvm.org/D39164 llvm-svn: 316297
* Strip trailing whitespace. NFCI.Simon Pilgrim2017-10-221-2/+2
| | | | llvm-svn: 316296
* Add logic to greedy reg alloc to avoid bad eviction chainsMarina Yatsina2017-10-2210-20/+881
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes bugzilla 26810 https://bugs.llvm.org/show_bug.cgi?id=26810 This is intended to prevent sequences like: movl %ebp, 8(%esp) # 4-byte Spill movl %ecx, %ebp movl %ebx, %ecx movl %edi, %ebx movl %edx, %edi cltd idivl %esi movl %edi, %edx movl %ebx, %edi movl %ecx, %ebx movl %ebp, %ecx movl 16(%esp), %ebp # 4 - byte Reload Such sequences are created in 2 scenarios: Scenario #1: vreg0 is evicted from physreg0 by vreg1 Evictee vreg0 is intended for region splitting with split candidate physreg0 (the reg vreg0 was evicted from) Region splitting creates a local interval because of interference with the evictor vreg1 (normally region spliiting creates 2 interval, the "by reg" and "by stack" intervals. Local interval created when interference occurs.) one of the split intervals ends up evicting vreg2 from physreg1 Evictee vreg2 is intended for region splitting with split candidate physreg1 one of the split intervals ends up evicting vreg3 from physreg2 etc.. until someone spills Scenario #2 vreg0 is evicted from physreg0 by vreg1 vreg2 is evicted from physreg2 by vreg3 etc Evictee vreg0 is intended for region splitting with split candidate physreg1 Region splitting creates a local interval because of interference with the evictor vreg1 one of the split intervals ends up evicting back original evictor vreg1 from physreg0 (the reg vreg0 was evicted from) Another evictee vreg2 is intended for region splitting with split candidate physreg1 one of the split intervals ends up evicting vreg3 from physreg2 etc.. until someone spills As compile time was a concern, I've added a flag to control weather we do cost calculations for local intervals we expect to be created (it's on by default for X86 target, off for the rest). Differential Revision: https://reviews.llvm.org/D35816 Change-Id: Id9411ff7bbb845463d289ba2ae97737a1ee7cc39 llvm-svn: 316295
* [X86] More correctly support LIG and WIG for EVEX instructions in the ↵Craig Topper2017-10-221-74/+168
| | | | | | | | | | disassembler tables. This is similar to how we generate the VEX tables. More fixes are still needed for the instructions that use EVEX.b (broadcast and embedded rounding). llvm-svn: 316294
* [SimplifyCFG] try harder to forward switch condition to phi (PR34471)Sanjay Patel2017-10-222-9/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The missed canonicalization/optimization in the motivating test from PR34471 leads to very different codegen: int switcher(int x) { switch(x) { case 17: return 17; case 19: return 19; case 42: return 42; default: break; } return 0; } int comparator(int x) { if (x == 17) return 17; if (x == 19) return 19; if (x == 42) return 42; return 0; } For the first example, we use a bit-test optimization to avoid a series of compare-and-branch: https://godbolt.org/g/BivDsw Differential Revision: https://reviews.llvm.org/D39011 llvm-svn: 316293
* [C++17] Fix PR34970 - tweak overload resolution for class template ↵Faisal Vali2017-10-229-30/+96
| | | | | | | | | | | | | | | | | | | deduction-guides in line with WG21's p0620r0. In order to identify the copy deduction candidate, I considered two approaches: - attempt to determine whether an implicit guide is a copy deduction candidate by checking certain properties of its subsituted parameter during overload-resolution. - using one of the many bits (WillHaveBody) from FunctionDecl (that CXXDeductionGuideDecl inherits from) that are otherwise irrelevant for deduction guides After some brittle gymnastics w the first strategy, I settled on the second, although to avoid confusion and to give that bit a better name, i turned it into a member of an anonymous union. Given this identification 'bit', the tweak to overload resolution was a simple reordering of the deduction guide checks (in SemaOverload.cpp::isBetterOverloadCandidate), in-line with Jason Merrill's p0620r0 drafting which made it into the working paper. Concordant with that, I made sure the copy deduction candidate is always added. References: See https://bugs.llvm.org/show_bug.cgi?id=34970 See http://wg21.link/p0620r0 llvm-svn: 316292
* shared: Implement aligned vector stores (vstorea_half)Jan Vesely2017-10-223-33/+59
| | | | | | | | | | Float version passes newly posted piglit tests on turks, float and double pass on carrizo. v2: scalar vstorea_half v3: fix typo Reviewer: Aaron Watry Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 316291
* shared: Implement aligned vector loads (vloada_half)Jan Vesely2017-10-223-27/+49
| | | | | | | | | | Passes newly posted piglits on turks and carrizo v2: add scalar vloada_half v3: fix typo Reviewer: Aaron Watry Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 316290
* [ARM] Dynamic stack alignment for 16-bit ThumbMomchil Velikov2017-10-226-24/+53
| | | | | | | | | | | This patch implements dynamic stack (re-)alignment for 16-bit Thumb. When targeting processors, which support only the 16-bit Thumb instruction set the compiler ignores the alignment attributes of automatic variables and may silently generate incorrect code. Differential revision: https://reviews.llvm.org/D38143 llvm-svn: 316289
* [X86] Add a pass to convert instruction chains between domains.Guy Blank2017-10-2212-666/+3277
| | | | | | | | | | | | | | | | | The pass scans the function to find instruction chains that define registers in the same domain (closures). It then calculates the cost of converting the closure to another domain. If found profitable, the instructions are converted to instructions in the other domain and the register classes are changed accordingly. This commit adds the pass infrastructure and a simple conversion from the GPR domain to the Mask domain. Differential Revision: https://reviews.llvm.org/D37251 Change-Id: Ic2cf1d76598110401168326d411128ae2580a604 llvm-svn: 316288
* [mips] Adds support for R_MIPS_26, HIGHER, HIGHEST relocations in RuntimeDyld.Nitesh Jain2017-10-226-16/+122
| | | | | | | | | | Reviewers: sdardis Subscribers: jaydeep, bhushan, llvm-commits Differential Revision: https://reviews.llvm.org/D38314 llvm-svn: 316287
* [Compiler-rt][MIPS] Fix cross build for XRAY.Nitesh Jain2017-10-221-2/+8
| | | | | | | | | | Reviewers: dberris, sdardis Subscribers: jaydeep, bhushan, llvm-commits Differential Revision: https://reviews.llvm.org/D38021 llvm-svn: 316286
* [X86] Teach the disassembler that some instructions use VEX.W==0 without a ↵Craig Topper2017-10-224-16/+32
| | | | | | | | corresponding VEX.W==1 instruction and we shouldn't treat them as if VEX.W is ignored. Fixes PR11304. llvm-svn: 316285
* [X86] Add VEX_WIG to applicable AVX512 instructions.Craig Topper2017-10-221-41/+43
| | | | | | This should be NFC. Will be used in future patches to fix disassembler bugs. llvm-svn: 316284
* [X86] Add VEX_WIG to VROUNDSSrr/VROUNDSSrm/VROUNDSDrr/VROUNDSDrmCraig Topper2017-10-221-1/+1
| | | | llvm-svn: 316283
* [X86] Don't allow gather/scatter to disassembler if memory operand does not ↵Craig Topper2017-10-222-0/+8
| | | | | | | | use a SIB byte. Fixes PR34998. llvm-svn: 316282
* Simplify.Rui Ueyama2017-10-221-11/+9
| | | | llvm-svn: 316281
* Assume that mergeable input sections are smaller than 4 GiB.Rui Ueyama2017-10-213-38/+39
| | | | | | | | | | | | | | | By assuming that mergeable input sections are smaller than 4 GiB, lld's memory usage when linking clang with debug info drops from 2.788 GiB to 2.019 GiB (measured by valgrind, and that does not include memory space for mmap'ed files). I think that's a reasonable assumption given such a large RAM savings, so this patch. According to valgrind, gold needs 3.54 GiB of RAM to do the same thing. NB: This patch does not introduce a limitation on the size of output sections. You can still create sections larger than 4 GiB. llvm-svn: 316280
* Reverting r316278 due to failing build bots.Aaron Ballman2017-10-213-104/+26
| | | | | | | http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/11896 http://lab.llvm.org:8011/builders/clang-s390x-linux/builds/12380 llvm-svn: 316279
* [libclang, bindings]: add spelling locationMasud Rahman2017-10-213-26/+104
| | | | | | | | | | | | | | | | | | o) Add a 'Location' class that represents the four properties of a physical location o) Enhance 'SourceLocation' to provide 'expansion' and 'spelling' locations, maintaining backwards compatibility with existing code by forwarding the four properties to 'expansion'. o) Update the implementation to use 'clang_getExpansionLocation' instead of the deprecated 'clang_getInstantiationLocation', which has been present since 2011. o) Update the implementation of 'clang_getSpellingLocation' to actually obtain spelling location instead of file location. llvm-svn: 316278
* Strip trailing whitespace. NFCI.Simon Pilgrim2017-10-211-4/+4
| | | | llvm-svn: 316277
* Reverting r316270 due to failing build bots.Aaron Ballman2017-10-212-24/+22
| | | | | | | http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules-2/builds/12899 http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/7951 llvm-svn: 316276
* Fix a typo with -fno-double-square-bracket-attributes and add a test to ↵Aaron Ballman2017-10-213-2/+17
| | | | | | demonstrate that it works as expected in C++11 mode. Additionally corrected the handling of -fdouble-square-bracket-attributes to be properly passed down to the cc1 option. llvm-svn: 316275
* [X86][SSE] Add extractps/pextrd equivalence to domain tablesSimon Pilgrim2017-10-2114-91/+87
| | | | | | Differential Revision: https://reviews.llvm.org/D39135 llvm-svn: 316274
* [X86] Fix disassembling of EVEX instructions to stop accidentally decoding ↵Craig Topper2017-10-216-143/+61
| | | | | | | | | | | | the SIB index register as an XMM/YMM/ZMM register. This introduces a new operand type to encode the whether the index register should be XMM/YMM/ZMM. And new code to fixup the results created by readSIB. This has the nice effect of removing a bunch of code that hard coded the name of every GATHER and SCATTER instruction to map the index type. This fixes PR32807. llvm-svn: 316273
* Fix MSVC 'result of 32-bit shift implicitly converted to 64 bits' warning. NFCI.Simon Pilgrim2017-10-211-2/+2
| | | | llvm-svn: 316271
* [PPC CodeGen] Fix the bitreverse.i64 intrinsic.Fangrui Song2017-10-212-22/+24
| | | | | | | | | | Summary: The two 32-bit words were swapped. Subscribers: nemanjai, kbarton Differential Revision: https://reviews.llvm.org/D38705 llvm-svn: 316270
* Add release notes for the recent -fdouble-square-bracket-attributes and ↵Aaron Ballman2017-10-211-0/+7
| | | | | | -fno-double-square-bracket-attributes compiler flags. llvm-svn: 316269
* [Sema] Fixes for enum handling for tautological comparison diagnosticsRoman Lebedev2017-10-215-58/+1232
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: As Mattias Eriksson has reported in PR35009, in C, for enums, the underlying type should be used when checking for the tautological comparison, unlike C++, where the enumerator values define the value range. So if not in CPlusPlus mode, use the enum underlying type. Also, i have discovered a problem (a crash) when evaluating tautological-ness of the following comparison: ``` enum A { A_a = 0 }; if (a < 0) // expected-warning {{comparison of unsigned enum expression < 0 is always false}} return 0; ``` This affects both the C and C++, but after the first fix, only C++ code was affected. That was also fixed, while preserving (i think?) the proper diagnostic output. And while there, attempt to enhance the test coverage. Yes, some tests got moved around, sorry about that :) Fixes PR35009 Reviewers: aaron.ballman, rsmith, rjmccall Reviewed By: aaron.ballman Subscribers: Rakete1111, efriedma, materi, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D39122 llvm-svn: 316268
* Fixing broken attribute documentation for __attribute__((noescape)); a code ↵Aaron Ballman2017-10-211-0/+3
| | | | | | block was missing and the existing code block was missing a mandatory newline. llvm-svn: 316267
* [ValueTracking] Remove unnecessary temporary APInt from ↵Craig Topper2017-10-211-5/+1
| | | | | | | | computeNumSignBitsVectorConstant. We can just use getNumSignBits instead of inverting negative numbers. llvm-svn: 316266
* [ValueTracking] Simplify the known bits code for constant vectors a little.Craig Topper2017-10-211-4/+2
| | | | | | Neither of these cases really require a temporary APInt outside the loop. For the ConstantDataSequential case the APInt will never be larger than 64-bits so its fine to just call getElementAsAPInt. For ConstantVector we can get the APInt by reference and only make a copy where the inversion is needed. llvm-svn: 316265
* [bindings] allow null strings in Python 3Masud Rahman2017-10-212-0/+5
| | | | | | | | | | | | | Some API calls accept 'NULL' instead of a char array (e.g. the second argument to 'clang_ParseTranslationUnit'). For Python 3 compatibility, all strings are passed through 'c_interop_string' which expects to receive only 'bytes' or 'str' objects. This change extends this behavior to additionally allow 'None' to be supplied. A test case was added which breaks in Python 3, and is fixed by this change. All the test cases pass in both, Python 2 and Python 3. llvm-svn: 316264
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