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| author | Fangrui Song <maskray@google.com> | 2017-10-21 16:59:40 +0000 |
|---|---|---|
| committer | Fangrui Song <maskray@google.com> | 2017-10-21 16:59:40 +0000 |
| commit | c7b749bd06824ad9bfb81bc159496b5361cd1ea5 (patch) | |
| tree | 7198b6eeb5997510eb78a4df0835725ee6901e8a | |
| parent | 2b3bc4ce2b5383d1ee5a46edcaa2f72fd4126371 (diff) | |
| download | bcm5719-llvm-c7b749bd06824ad9bfb81bc159496b5361cd1ea5.tar.gz bcm5719-llvm-c7b749bd06824ad9bfb81bc159496b5361cd1ea5.zip | |
[PPC CodeGen] Fix the bitreverse.i64 intrinsic.
Summary: The two 32-bit words were swapped.
Subscribers: nemanjai, kbarton
Differential Revision: https://reviews.llvm.org/D38705
llvm-svn: 316270
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 14 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/testBitReverse.ll | 32 |
2 files changed, 24 insertions, 22 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index e22c466b203..92cf29c4548 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -4668,7 +4668,7 @@ def DWLo32RotateInsertByte1 { } def ExtendLo32 { - dag To64Bit = + dag ToLo32 = (i64 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), DWLo32RotateInsertByte1.Left, sub_32)); } @@ -4695,15 +4695,17 @@ def DWHi32RotateInsertByte1 { (RLWIMI DWHi32RotateInsertByte3.Left, DWExtractHi32.SubReg, 8, 24, 31); } -def ExtendHi32 { - dag To64Bit = +def MoveHi32 { + dag ToLo32 = (i64 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), DWHi32RotateInsertByte1.Left, sub_32)); } -def DWShiftLo32 { // SLDI ExtendHi32.To64Bit, 32 - dag ToHi32 = (RLDICR ExtendHi32.To64Bit, 32, 31); +// Now byte-swap within the high word and low word both are done, next +// swap the high word and low word. +def DWShiftLo32 { // SLDI ExtendLo32.ToLo32, 32 + dag ToHi32 = (RLDICR ExtendLo32.ToLo32, 32, 31); } def : Pat<(i64 (bitreverse i64:$A)), - (OR8 DWShiftLo32.ToHi32, ExtendLo32.To64Bit)>; + (OR8 DWShiftLo32.ToHi32, MoveHi32.ToLo32)>; diff --git a/llvm/test/CodeGen/PowerPC/testBitReverse.ll b/llvm/test/CodeGen/PowerPC/testBitReverse.ll index 6993d17ad8f..1508af9e4d0 100644 --- a/llvm/test/CodeGen/PowerPC/testBitReverse.ll +++ b/llvm/test/CodeGen/PowerPC/testBitReverse.ll @@ -67,38 +67,38 @@ define i64 @testBitReverseIntrinsicI64(i64 %arg) { ; CHECK-NEXT: and 4, 8, 4 ; CHECK-NEXT: lis 7, 3855 ; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: oris 12, 5, 52428 -; CHECK-NEXT: oris 9, 6, 13107 +; CHECK-NEXT: oris 9, 5, 52428 +; CHECK-NEXT: oris 10, 6, 13107 ; CHECK-NEXT: lis 6, -3856 ; CHECK-NEXT: ori 7, 7, 3855 ; CHECK-NEXT: sldi 8, 3, 2 -; CHECK-NEXT: ori 4, 12, 52428 +; CHECK-NEXT: ori 4, 9, 52428 ; CHECK-NEXT: rldicl 3, 3, 62, 2 -; CHECK-NEXT: ori 5, 9, 13107 +; CHECK-NEXT: ori 5, 10, 13107 ; CHECK-NEXT: ori 6, 6, 61680 ; CHECK-NEXT: and 3, 3, 5 ; CHECK-NEXT: sldi 5, 6, 32 ; CHECK-NEXT: and 4, 8, 4 ; CHECK-NEXT: sldi 6, 7, 32 ; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: oris 10, 5, 61680 -; CHECK-NEXT: oris 11, 6, 3855 +; CHECK-NEXT: oris 11, 5, 61680 +; CHECK-NEXT: oris 12, 6, 3855 ; CHECK-NEXT: sldi 6, 3, 4 -; CHECK-NEXT: ori 4, 10, 61680 +; CHECK-NEXT: ori 4, 11, 61680 ; CHECK-NEXT: rldicl 3, 3, 60, 4 -; CHECK-NEXT: ori 5, 11, 3855 +; CHECK-NEXT: ori 5, 12, 3855 ; CHECK-NEXT: and 4, 6, 4 ; CHECK-NEXT: and 3, 3, 5 ; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: rlwinm 5, 3, 24, 0, 31 ; CHECK-NEXT: rldicl 4, 3, 32, 32 -; CHECK-NEXT: rlwinm 6, 3, 24, 0, 31 -; CHECK-NEXT: rlwinm 5, 4, 24, 0, 31 -; CHECK-NEXT: rlwimi 6, 3, 8, 8, 15 -; CHECK-NEXT: rlwimi 5, 4, 8, 8, 15 -; CHECK-NEXT: rlwimi 6, 3, 8, 24, 31 -; CHECK-NEXT: rlwimi 5, 4, 8, 24, 31 -; CHECK-NEXT: sldi 12, 5, 32 -; CHECK-NEXT: or 3, 12, 6 +; CHECK-NEXT: rlwinm 6, 4, 24, 0, 31 +; CHECK-NEXT: rlwimi 5, 3, 8, 8, 15 +; CHECK-NEXT: rlwimi 6, 4, 8, 8, 15 +; CHECK-NEXT: rlwimi 5, 3, 8, 24, 31 +; CHECK-NEXT: rlwimi 6, 4, 8, 24, 31 +; CHECK-NEXT: sldi 3, 5, 32 +; CHECK-NEXT: or 3, 3, 6 ; CHECK-NEXT: blr %res = call i64 @llvm.bitreverse.i64(i64 %arg) ret i64 %res |
