summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/SubtargetEmitter.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/utils/TableGen/SubtargetEmitter.cpp')
-rw-r--r--llvm/utils/TableGen/SubtargetEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 7cfd062ab7b..fa9851af535 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -372,7 +372,7 @@ EmitStageAndOperandCycleData(raw_ostream &OS,
std::vector<Record*> BPs = ProcModel.ItinsDef->getValueAsListOfDefs("BP");
if (!BPs.empty()) {
- OS << "\n// Pipeline forwarding pathes for itineraries \"" << Name
+ OS << "\n// Pipeline forwarding paths for itineraries \"" << Name
<< "\"\n" << "namespace " << Name << "Bypass {\n";
OS << " const unsigned NoBypass = 0;\n";
@@ -865,7 +865,7 @@ void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
IdxVec Writes = SC.Writes;
IdxVec Reads = SC.Reads;
if (!SC.InstRWs.empty()) {
- // This class has a default ReadWrite list which can be overriden by
+ // This class has a default ReadWrite list which can be overridden by
// InstRW definitions.
Record *RWDef = nullptr;
for (Record *RW : SC.InstRWs) {
OpenPOWER on IntegriCloud