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-rw-r--r--llvm/utils/TableGen/FastISelEmitter.cpp9
1 files changed, 4 insertions, 5 deletions
diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp
index f589bcc9e45..b94ded64526 100644
--- a/llvm/utils/TableGen/FastISelEmitter.cpp
+++ b/llvm/utils/TableGen/FastISelEmitter.cpp
@@ -73,10 +73,9 @@ struct OperandsSignature {
if (!Op->getPredicateFns().empty())
return false;
// For now, filter out any operand with multiple values.
- if (Op->getExtTypes().size() != 1)
- return false;
+ assert(Op->hasTypeSet() && "Type infererence not done?");
// For now, all the operands must have the same type.
- if (Op->getTypeNum(0) != VT)
+ if (Op->getType() != VT)
return false;
if (!Op->isLeaf()) {
if (Op->getOperator()->getName() == "imm") {
@@ -296,10 +295,10 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) {
Record *InstPatOp = InstPatNode->getOperator();
std::string OpcodeName = getOpcodeName(InstPatOp, CGP);
- MVT::SimpleValueType RetVT = InstPatNode->getTypeNum(0);
+ MVT::SimpleValueType RetVT = InstPatNode->getType();
MVT::SimpleValueType VT = RetVT;
if (InstPatNode->getNumChildren())
- VT = InstPatNode->getChild(0)->getTypeNum(0);
+ VT = InstPatNode->getChild(0)->getType();
// For now, filter out instructions which just set a register to
// an Operand or an immediate, like MOV32ri.
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