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-rw-r--r--llvm/utils/TableGen/CodeGenRegisters.cpp16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index 95394bdee02..145ec26c9eb 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -191,6 +191,9 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
if (!SubRegs.insert(std::make_pair(Idx, SR)).second)
throw TGError(TheDef->getLoc(), "SubRegIndex " + Idx->getName() +
" appears twice in Register " + getName());
+ // Map explicit sub-registers first, so the names take precedence.
+ // The inherited sub-registers are mapped below.
+ SubReg2Idx.insert(std::make_pair(SR, Idx));
}
// Keep track of inherited subregs and how they can be reached.
@@ -309,6 +312,19 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
SubRegs[RegBank.getCompositeSubRegIndex(Idx, SI->first)] = SI->second;
}
+ // Compute the inverse SubReg -> Idx map.
+ for (SubRegMap::const_iterator SI = SubRegs.begin(), SE = SubRegs.end();
+ SI != SE; ++SI) {
+ // Ignore idempotent sub-register indices.
+ if (SI->second == this)
+ continue;
+ // Is is possible to have multiple names for the same sub-register.
+ // For example, XMM0 appears as sub_xmm, sub_sd, and sub_ss in YMM0.
+ // Eventually, this degeneration should go away, but for now we simply give
+ // precedence to the explicit sub-register index over the inherited ones.
+ SubReg2Idx.insert(std::make_pair(SI->second, SI->first));
+ }
+
// Initialize RegUnitList. A register with no subregisters creates its own
// unit. Otherwise, it inherits all its subregister's units. Because
// getSubRegs is called recursively, this processes the register hierarchy in
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