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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-09 22:15:00 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-05-09 22:15:00 +0000 |
| commit | 9b41e5dbc6314e3163fe3d7786ba8688682a9fdd (patch) | |
| tree | 64c14d62aab632d2500f7b792b21897d2a49b3de /llvm/utils/TableGen/CodeGenRegisters.cpp | |
| parent | 7d1fa380c57460d5edbdfa16dd1545f981390043 (diff) | |
| download | bcm5719-llvm-9b41e5dbc6314e3163fe3d7786ba8688682a9fdd.tar.gz bcm5719-llvm-9b41e5dbc6314e3163fe3d7786ba8688682a9fdd.zip | |
Compute a backwards SubReg -> SubRegIndex map for each register.
This mapping is for internal use by TableGen. It will not be exposed in
the generated files.
Unfortunately, the mapping is not completely well-defined. The X86 xmm
registers appear with multiple sub-register indices in the ymm
registers. This is because of the odd idempotent sub_sd and sub_ss
sub-register indices. I hope to be able to eliminate them entirely, so
we can require the sub-registers to form a tree.
For now, just place the canonical sub_xmm index in the mapping, and
ignore the idempotents.
llvm-svn: 156519
Diffstat (limited to 'llvm/utils/TableGen/CodeGenRegisters.cpp')
| -rw-r--r-- | llvm/utils/TableGen/CodeGenRegisters.cpp | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp index 95394bdee02..145ec26c9eb 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.cpp +++ b/llvm/utils/TableGen/CodeGenRegisters.cpp @@ -191,6 +191,9 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) { if (!SubRegs.insert(std::make_pair(Idx, SR)).second) throw TGError(TheDef->getLoc(), "SubRegIndex " + Idx->getName() + " appears twice in Register " + getName()); + // Map explicit sub-registers first, so the names take precedence. + // The inherited sub-registers are mapped below. + SubReg2Idx.insert(std::make_pair(SR, Idx)); } // Keep track of inherited subregs and how they can be reached. @@ -309,6 +312,19 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) { SubRegs[RegBank.getCompositeSubRegIndex(Idx, SI->first)] = SI->second; } + // Compute the inverse SubReg -> Idx map. + for (SubRegMap::const_iterator SI = SubRegs.begin(), SE = SubRegs.end(); + SI != SE; ++SI) { + // Ignore idempotent sub-register indices. + if (SI->second == this) + continue; + // Is is possible to have multiple names for the same sub-register. + // For example, XMM0 appears as sub_xmm, sub_sd, and sub_ss in YMM0. + // Eventually, this degeneration should go away, but for now we simply give + // precedence to the explicit sub-register index over the inherited ones. + SubReg2Idx.insert(std::make_pair(SI->second, SI->first)); + } + // Initialize RegUnitList. A register with no subregisters creates its own // unit. Otherwise, it inherits all its subregister's units. Because // getSubRegs is called recursively, this processes the register hierarchy in |

