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-rw-r--r--llvm/unittests/tools/llvm-exegesis/X86/AssemblerTest.cpp23
-rw-r--r--llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp18
-rw-r--r--llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp21
3 files changed, 27 insertions, 35 deletions
diff --git a/llvm/unittests/tools/llvm-exegesis/X86/AssemblerTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/AssemblerTest.cpp
index 8e81106db8d..e83d004e8a6 100644
--- a/llvm/unittests/tools/llvm-exegesis/X86/AssemblerTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/AssemblerTest.cpp
@@ -39,12 +39,19 @@ protected:
};
TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunction) {
- Check({}, llvm::MCInst(), 0xc3);
+ Check(ExegesisTarget::getDefault(), {}, llvm::MCInst(), 0xc3);
+}
+
+TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionXOR32rr_Default) {
+ Check(ExegesisTarget::getDefault(), {EAX},
+ MCInstBuilder(XOR32rr).addReg(EAX).addReg(EAX).addReg(EAX), 0x31, 0xc0,
+ 0xc3);
}
TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionXOR32rr_X86) {
- Check({{EAX, llvm::APInt(32, 1)}},
- MCInstBuilder(XOR32rr).addReg(EAX).addReg(EAX).addReg(EAX),
+ const auto *ET = ExegesisTarget::lookup(llvm::Triple("x86_64-unknown-linux"));
+ ASSERT_NE(ET, nullptr);
+ Check(*ET, {EAX}, MCInstBuilder(XOR32rr).addReg(EAX).addReg(EAX).addReg(EAX),
// mov eax, 1
0xb8, 0x01, 0x00, 0x00, 0x00,
// xor eax, eax
@@ -52,13 +59,15 @@ TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionXOR32rr_X86) {
}
TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionMOV64ri) {
- Check({}, MCInstBuilder(MOV64ri32).addReg(RAX).addImm(42), 0x48, 0xc7, 0xc0,
- 0x2a, 0x00, 0x00, 0x00, 0xc3);
+ Check(ExegesisTarget::getDefault(), {},
+ MCInstBuilder(MOV64ri32).addReg(RAX).addImm(42), 0x48, 0xc7, 0xc0, 0x2a,
+ 0x00, 0x00, 0x00, 0xc3);
}
TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionMOV32ri) {
- Check({}, MCInstBuilder(MOV32ri).addReg(EAX).addImm(42), 0xb8, 0x2a, 0x00,
- 0x00, 0x00, 0xc3);
+ Check(ExegesisTarget::getDefault(), {},
+ MCInstBuilder(MOV32ri).addReg(EAX).addImm(42), 0xb8, 0x2a, 0x00, 0x00,
+ 0x00, 0xc3);
}
} // namespace
diff --git a/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
index 0ef2a707993..0c255ac74e3 100644
--- a/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
@@ -261,13 +261,7 @@ private:
using FakeSnippetGeneratorTest = SnippetGeneratorTest<FakeSnippetGenerator>;
-testing::Matcher<const RegisterValue &> IsRegisterValue(unsigned Reg,
- llvm::APInt Value) {
- return testing::AllOf(testing::Field(&RegisterValue::Register, Reg),
- testing::Field(&RegisterValue::Value, Value));
-}
-
-TEST_F(FakeSnippetGeneratorTest, ComputeRegisterInitialValuesAdd16ri) {
+TEST_F(FakeSnippetGeneratorTest, ComputeRegsToDefAdd16ri) {
// ADD16ri:
// explicit def 0 : reg RegClass=GR16
// explicit use 1 : reg RegClass=GR16 | TIED_TO:0
@@ -278,11 +272,11 @@ TEST_F(FakeSnippetGeneratorTest, ComputeRegisterInitialValuesAdd16ri) {
llvm::MCOperand::createReg(llvm::X86::AX);
std::vector<InstructionBuilder> Snippet;
Snippet.push_back(std::move(IB));
- const auto RIV = Generator.computeRegisterInitialValues(Snippet);
- EXPECT_THAT(RIV, ElementsAre(IsRegisterValue(llvm::X86::AX, llvm::APInt())));
+ const auto RegsToDef = Generator.computeRegsToDef(Snippet);
+ EXPECT_THAT(RegsToDef, UnorderedElementsAre(llvm::X86::AX));
}
-TEST_F(FakeSnippetGeneratorTest, ComputeRegisterInitialValuesAdd64rr) {
+TEST_F(FakeSnippetGeneratorTest, ComputeRegsToDefAdd64rr) {
// ADD64rr:
// mov64ri rax, 42
// add64rr rax, rax, rbx
@@ -304,8 +298,8 @@ TEST_F(FakeSnippetGeneratorTest, ComputeRegisterInitialValuesAdd64rr) {
Snippet.push_back(std::move(Add));
}
- const auto RIV = Generator.computeRegisterInitialValues(Snippet);
- EXPECT_THAT(RIV, ElementsAre(IsRegisterValue(llvm::X86::RBX, llvm::APInt())));
+ const auto RegsToDef = Generator.computeRegsToDef(Snippet);
+ EXPECT_THAT(RegsToDef, UnorderedElementsAre(llvm::X86::RBX));
}
} // namespace
diff --git a/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
index 4d50b0427ed..c60f003c727 100644
--- a/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
@@ -125,7 +125,7 @@ protected:
}
std::vector<MCInst> setRegTo(unsigned Reg, const APInt &Value) {
- return ExegesisTarget_->setRegTo(*STI_, Reg, Value);
+ return ExegesisTarget_->setRegTo(*STI_, Value, Reg);
}
const llvm::Target *Target_;
@@ -137,16 +137,6 @@ using Core2TargetTest = X86TargetTest<kCpuCore2, kFeaturesEmpty>;
using Core2AvxTargetTest = X86TargetTest<kCpuCore2, kFeaturesAvx>;
using Core2Avx512TargetTest = X86TargetTest<kCpuCore2, kFeaturesAvx512VL>;
-TEST_F(Core2TargetTest, SetFlags) {
- const unsigned Reg = llvm::X86::EFLAGS;
- EXPECT_THAT(
- setRegTo(Reg, APInt(64, 0x1111222233334444ULL)),
- ElementsAre(IsStackAllocate(8),
- IsMovValueToStack(llvm::X86::MOV32mi, 0x33334444UL, 0),
- IsMovValueToStack(llvm::X86::MOV32mi, 0x11112222UL, 4),
- OpcodeIs(llvm::X86::POPF64)));
-}
-
TEST_F(Core2TargetTest, SetRegToGR8Value) {
const uint8_t Value = 0xFFU;
const unsigned Reg = llvm::X86::AL;
@@ -295,7 +285,7 @@ TEST_F(Core2TargetTest, SetRegToST0_32Bits) {
setRegTo(llvm::X86::ST0, APInt(32, 0x11112222ULL)),
ElementsAre(IsStackAllocate(4),
IsMovValueToStack(llvm::X86::MOV32mi, 0x11112222UL, 0),
- OpcodeIs(llvm::X86::LD_F32m), IsStackDeallocate(4)));
+ testing::A<MCInst>(), IsStackDeallocate(4)));
}
TEST_F(Core2TargetTest, SetRegToST1_32Bits) {
@@ -305,8 +295,7 @@ TEST_F(Core2TargetTest, SetRegToST1_32Bits) {
setRegTo(llvm::X86::ST1, APInt(32, 0x11112222ULL)),
ElementsAre(IsStackAllocate(4),
IsMovValueToStack(llvm::X86::MOV32mi, 0x11112222UL, 0),
- OpcodeIs(llvm::X86::LD_F32m), CopySt0ToSt1,
- IsStackDeallocate(4)));
+ testing::A<MCInst>(), CopySt0ToSt1, IsStackDeallocate(4)));
}
TEST_F(Core2TargetTest, SetRegToST0_64Bits) {
@@ -315,7 +304,7 @@ TEST_F(Core2TargetTest, SetRegToST0_64Bits) {
ElementsAre(IsStackAllocate(8),
IsMovValueToStack(llvm::X86::MOV32mi, 0x33334444UL, 0),
IsMovValueToStack(llvm::X86::MOV32mi, 0x11112222UL, 4),
- OpcodeIs(llvm::X86::LD_F64m), IsStackDeallocate(8)));
+ testing::A<MCInst>(), IsStackDeallocate(8)));
}
TEST_F(Core2TargetTest, SetRegToST0_80Bits) {
@@ -325,7 +314,7 @@ TEST_F(Core2TargetTest, SetRegToST0_80Bits) {
IsMovValueToStack(llvm::X86::MOV32mi, 0x44445555UL, 0),
IsMovValueToStack(llvm::X86::MOV32mi, 0x22223333UL, 4),
IsMovValueToStack(llvm::X86::MOV16mi, 0x1111UL, 8),
- OpcodeIs(llvm::X86::LD_F80m), IsStackDeallocate(10)));
+ testing::A<MCInst>(), IsStackDeallocate(10)));
}
} // namespace
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