diff options
Diffstat (limited to 'llvm/test/MC/Disassembler/ARM')
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/armv8.3a-js-arm.txt | 10 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/armv8.3a-js-thumb.txt | 10 |
2 files changed, 20 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/ARM/armv8.3a-js-arm.txt b/llvm/test/MC/Disassembler/ARM/armv8.3a-js-arm.txt new file mode 100644 index 00000000000..e8750036451 --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/armv8.3a-js-arm.txt @@ -0,0 +1,10 @@ +# RUN: llvm-mc -triple arm-none-eabi -mattr=+v8.3a,+fp-armv8 --disassemble < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -triple arm-none-eabi -mattr=+v8.2a,+fp-armv8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=UNDEF +# RUN: not llvm-mc -triple arm-none-eabi -mattr=+v8.3a,-fp-armv8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=UNDEF + +[0xc2,0x0b,0xf9,0xee] +# CHECK: vjcvt.s32.f64 s1, d2 +# UNDEF: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding +[0xe2,0x8b,0xf9,0xee] +# CHECK: vjcvt.s32.f64 s17, d18 +# UNDEF: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding diff --git a/llvm/test/MC/Disassembler/ARM/armv8.3a-js-thumb.txt b/llvm/test/MC/Disassembler/ARM/armv8.3a-js-thumb.txt new file mode 100644 index 00000000000..b21f01232ba --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/armv8.3a-js-thumb.txt @@ -0,0 +1,10 @@ +# RUN: llvm-mc -triple thumb-none-eabi -mattr=+v8.3a,+fp-armv8 --disassemble < %s 2>&1 | FileCheck %s +# RUN: not llvm-mc -triple thumb-none-eabi -mattr=+v8.2a,+fp-armv8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=UNDEF +# RUN: not llvm-mc -triple thumb-none-eabi -mattr=+v8.3a,-fp-armv8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=UNDEF + +[0xf9,0xee,0xc2,0x0b] +# CHECK: vjcvt.s32.f64 s1, d2 +# UNDEF: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding +[0xf9,0xee,0xe2,0x8b] +# CHECK: vjcvt.s32.f64 s17, d18 +# UNDEF: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding |
